reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenAsmMatcher.inc
 8973   case MCK_Imm7Shift0: {
 9735   case MCK_Imm7Shift0: return "MCK_Imm7Shift0";
12904   { 2423 /* vldrb */, ARM::MVE_VLDRBS16_post, Convert__MemNoOffsetT1_3__Reg1_2__Tie0_4_4__Imm7Shift01_4__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_s16, MCK_MQPR, MCK_MemNoOffsetT, MCK_Imm7Shift0 }, },
12906   { 2423 /* vldrb */, ARM::MVE_VLDRBS32_post, Convert__MemNoOffsetT1_3__Reg1_2__Tie0_4_4__Imm7Shift01_4__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_s32, MCK_MQPR, MCK_MemNoOffsetT, MCK_Imm7Shift0 }, },
12908   { 2423 /* vldrb */, ARM::MVE_VLDRBU16_post, Convert__MemNoOffsetT1_3__Reg1_2__Tie0_4_4__Imm7Shift01_4__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u16, MCK_MQPR, MCK_MemNoOffsetT, MCK_Imm7Shift0 }, },
12910   { 2423 /* vldrb */, ARM::MVE_VLDRBU32_post, Convert__MemNoOffsetT1_3__Reg1_2__Tie0_4_4__Imm7Shift01_4__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u32, MCK_MQPR, MCK_MemNoOffsetT, MCK_Imm7Shift0 }, },
12913   { 2423 /* vldrb */, ARM::MVE_VLDRBU8_post, Convert__MemNoOffsetT21_3__Reg1_2__Tie0_4_4__Imm7Shift01_4__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_MQPR, MCK_MemNoOffsetT2, MCK_Imm7Shift0 }, },
14914   { 3845 /* vstrb */, ARM::MVE_VSTRB16_post, Convert__MemNoOffsetT1_3__Reg1_2__Tie0_4_4__Imm7Shift01_4__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_16, MCK_MQPR, MCK_MemNoOffsetT, MCK_Imm7Shift0 }, },
14916   { 3845 /* vstrb */, ARM::MVE_VSTRB32_post, Convert__MemNoOffsetT1_3__Reg1_2__Tie0_4_4__Imm7Shift01_4__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_32, MCK_MQPR, MCK_MemNoOffsetT, MCK_Imm7Shift0 }, },
14919   { 3845 /* vstrb */, ARM::MVE_VSTRBU8_post, Convert__MemNoOffsetT2NoSp1_3__Reg1_2__Tie0_4_4__Imm7Shift01_4__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_8, MCK_MQPR, MCK_MemNoOffsetT2NoSp, MCK_Imm7Shift0 }, },