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References

gen/lib/Target/ARM/ARMGenAsmMatcher.inc
 7547   case MCK_CoprocOption: {
 9545   case MCK_CoprocOption: return "MCK_CoprocOption";
10550   { 502 /* ldc */, ARM::LDC_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, AMFBS_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
10551   { 502 /* ldc */, ARM::t2LDC_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
10557   { 506 /* ldc2 */, ARM::LDC2_OPTION, Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__CoprocOption1_3, AMFBS_IsARM_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
10560   { 506 /* ldc2 */, ARM::t2LDC2_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, AMFBS_PreV8_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
10565   { 511 /* ldc2l */, ARM::LDC2L_OPTION, Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__CoprocOption1_3, AMFBS_IsARM_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
10568   { 511 /* ldc2l */, ARM::t2LDC2L_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, AMFBS_PreV8_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
10574   { 517 /* ldcl */, ARM::LDCL_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, AMFBS_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
10575   { 517 /* ldcl */, ARM::t2LDCL_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
11211   { 1454 /* stc */, ARM::STC_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, AMFBS_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
11212   { 1454 /* stc */, ARM::t2STC_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
11218   { 1458 /* stc2 */, ARM::STC2_OPTION, Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__CoprocOption1_3, AMFBS_IsARM_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
11221   { 1458 /* stc2 */, ARM::t2STC2_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, AMFBS_PreV8_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
11226   { 1463 /* stc2l */, ARM::STC2L_OPTION, Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__CoprocOption1_3, AMFBS_IsARM_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
11229   { 1463 /* stc2l */, ARM::t2STC2L_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, AMFBS_PreV8_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
11235   { 1469 /* stcl */, ARM::STCL_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, AMFBS_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
11236   { 1469 /* stcl */, ARM::t2STCL_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, },
15405   { 502 /* ldc */, 16 /* 4 */, MCK_CoprocOption, AMFBS_IsARM },
15408   { 502 /* ldc */, 16 /* 4 */, MCK_CoprocOption, AMFBS_IsThumb2 },
15421   { 506 /* ldc2 */, 8 /* 3 */, MCK_CoprocOption, AMFBS_IsARM_PreV8 },
15428   { 506 /* ldc2 */, 16 /* 4 */, MCK_CoprocOption, AMFBS_PreV8_IsThumb2 },
15439   { 511 /* ldc2l */, 8 /* 3 */, MCK_CoprocOption, AMFBS_IsARM_PreV8 },
15446   { 511 /* ldc2l */, 16 /* 4 */, MCK_CoprocOption, AMFBS_PreV8_IsThumb2 },
15459   { 517 /* ldcl */, 16 /* 4 */, MCK_CoprocOption, AMFBS_IsARM },
15462   { 517 /* ldcl */, 16 /* 4 */, MCK_CoprocOption, AMFBS_IsThumb2 },
15564   { 1454 /* stc */, 16 /* 4 */, MCK_CoprocOption, AMFBS_IsARM },
15567   { 1454 /* stc */, 16 /* 4 */, MCK_CoprocOption, AMFBS_IsThumb2 },
15580   { 1458 /* stc2 */, 8 /* 3 */, MCK_CoprocOption, AMFBS_IsARM_PreV8 },
15587   { 1458 /* stc2 */, 16 /* 4 */, MCK_CoprocOption, AMFBS_PreV8_IsThumb2 },
15598   { 1463 /* stc2l */, 8 /* 3 */, MCK_CoprocOption, AMFBS_IsARM_PreV8 },
15605   { 1463 /* stc2l */, 16 /* 4 */, MCK_CoprocOption, AMFBS_PreV8_IsThumb2 },
15618   { 1469 /* stcl */, 16 /* 4 */, MCK_CoprocOption, AMFBS_IsARM },
15621   { 1469 /* stcl */, 16 /* 4 */, MCK_CoprocOption, AMFBS_IsThumb2 },
16219   case MCK_CoprocOption: