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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc12184 { 2185 /* vcvt */, ARM::MVE_VCVTs16f16z, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_s16, MCK__DOT_f16, MCK_MQPR, MCK_MQPR }, },
12185 { 2185 /* vcvt */, ARM::MVE_VCVTs32f32z, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_s32, MCK__DOT_f32, MCK_MQPR, MCK_MQPR }, },
12186 { 2185 /* vcvt */, ARM::MVE_VCVTu16f16z, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_u16, MCK__DOT_f16, MCK_MQPR, MCK_MQPR }, },
12187 { 2185 /* vcvt */, ARM::MVE_VCVTu32f32z, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_u32, MCK__DOT_f32, MCK_MQPR, MCK_MQPR }, },
12188 { 2185 /* vcvt */, ARM::MVE_VCVTf32s32n, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_f32, MCK__DOT_s32, MCK_MQPR, MCK_MQPR }, },
12189 { 2185 /* vcvt */, ARM::MVE_VCVTf32u32n, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_f32, MCK__DOT_u32, MCK_MQPR, MCK_MQPR }, },
12190 { 2185 /* vcvt */, ARM::MVE_VCVTf16s16n, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_f16, MCK__DOT_s16, MCK_MQPR, MCK_MQPR }, },
12191 { 2185 /* vcvt */, ARM::MVE_VCVTf16u16n, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_f16, MCK__DOT_u16, MCK_MQPR, MCK_MQPR }, },
12270 { 2190 /* vcvta */, ARM::MVE_VCVTs16f16a, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_s16, MCK__DOT_f16, MCK_MQPR, MCK_MQPR }, },
12271 { 2190 /* vcvta */, ARM::MVE_VCVTs32f32a, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_s32, MCK__DOT_f32, MCK_MQPR, MCK_MQPR }, },
12272 { 2190 /* vcvta */, ARM::MVE_VCVTu16f16a, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_u16, MCK__DOT_f16, MCK_MQPR, MCK_MQPR }, },
12273 { 2190 /* vcvta */, ARM::MVE_VCVTu32f32a, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_u32, MCK__DOT_f32, MCK_MQPR, MCK_MQPR }, },
12294 { 2202 /* vcvtm */, ARM::MVE_VCVTs16f16m, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_s16, MCK__DOT_f16, MCK_MQPR, MCK_MQPR }, },
12295 { 2202 /* vcvtm */, ARM::MVE_VCVTs32f32m, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_s32, MCK__DOT_f32, MCK_MQPR, MCK_MQPR }, },
12296 { 2202 /* vcvtm */, ARM::MVE_VCVTu16f16m, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_u16, MCK__DOT_f16, MCK_MQPR, MCK_MQPR }, },
12297 { 2202 /* vcvtm */, ARM::MVE_VCVTu32f32m, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_u32, MCK__DOT_f32, MCK_MQPR, MCK_MQPR }, },
12312 { 2208 /* vcvtn */, ARM::MVE_VCVTs16f16n, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_s16, MCK__DOT_f16, MCK_MQPR, MCK_MQPR }, },
12313 { 2208 /* vcvtn */, ARM::MVE_VCVTs32f32n, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_s32, MCK__DOT_f32, MCK_MQPR, MCK_MQPR }, },
12314 { 2208 /* vcvtn */, ARM::MVE_VCVTu16f16n, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_u16, MCK__DOT_f16, MCK_MQPR, MCK_MQPR }, },
12315 { 2208 /* vcvtn */, ARM::MVE_VCVTu32f32n, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_u32, MCK__DOT_f32, MCK_MQPR, MCK_MQPR }, },
12330 { 2214 /* vcvtp */, ARM::MVE_VCVTs16f16p, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_s16, MCK__DOT_f16, MCK_MQPR, MCK_MQPR }, },
12331 { 2214 /* vcvtp */, ARM::MVE_VCVTs32f32p, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_s32, MCK__DOT_f32, MCK_MQPR, MCK_MQPR }, },
12332 { 2214 /* vcvtp */, ARM::MVE_VCVTu16f16p, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_u16, MCK__DOT_f16, MCK_MQPR, MCK_MQPR }, },
12333 { 2214 /* vcvtp */, ARM::MVE_VCVTu32f32p, Convert__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEFloat, { MCK_VPTPredR, MCK__DOT_u32, MCK__DOT_f32, MCK_MQPR, MCK_MQPR }, },