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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc12256 { 2190 /* vcvta */, ARM::VCVTANSQh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, },
12257 { 2190 /* vcvta */, ARM::VCVTANSDh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, },
12263 { 2190 /* vcvta */, ARM::VCVTANUQh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, },
12264 { 2190 /* vcvta */, ARM::VCVTANUDh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, },
12280 { 2202 /* vcvtm */, ARM::VCVTMNSQh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, },
12281 { 2202 /* vcvtm */, ARM::VCVTMNSDh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, },
12287 { 2202 /* vcvtm */, ARM::VCVTMNUQh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, },
12288 { 2202 /* vcvtm */, ARM::VCVTMNUDh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, },
12298 { 2208 /* vcvtn */, ARM::VCVTNNSQh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, },
12299 { 2208 /* vcvtn */, ARM::VCVTNNSDh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, },
12305 { 2208 /* vcvtn */, ARM::VCVTNNUQh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, },
12306 { 2208 /* vcvtn */, ARM::VCVTNNUDh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, },
12316 { 2214 /* vcvtp */, ARM::VCVTPNSQh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, },
12317 { 2214 /* vcvtp */, ARM::VCVTPNSDh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, },
12323 { 2214 /* vcvtp */, ARM::VCVTPNUQh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, },
12324 { 2214 /* vcvtp */, ARM::VCVTPNUDh, Convert__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, },
12990 { 2477 /* vmaxnm */, ARM::NEON_VMAXNMNQh, Convert__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, },
12991 { 2477 /* vmaxnm */, ARM::NEON_VMAXNMNDh, Convert__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, },
13055 { 2533 /* vminnm */, ARM::NEON_VMINNMNQh, Convert__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, },
13056 { 2533 /* vminnm */, ARM::NEON_VMINNMNDh, Convert__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, },
14167 { 3404 /* vrinta */, ARM::VRINTANQh, Convert__Reg1_1__Reg1_2, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR }, },
14168 { 3404 /* vrinta */, ARM::VRINTANDh, Convert__Reg1_1__Reg1_2, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR }, },
14182 { 3411 /* vrintm */, ARM::VRINTMNQh, Convert__Reg1_1__Reg1_2, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR }, },
14183 { 3411 /* vrintm */, ARM::VRINTMNDh, Convert__Reg1_1__Reg1_2, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR }, },
14197 { 3418 /* vrintn */, ARM::VRINTNNQh, Convert__Reg1_1__Reg1_2, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR }, },
14198 { 3418 /* vrintn */, ARM::VRINTNNDh, Convert__Reg1_1__Reg1_2, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR }, },
14212 { 3425 /* vrintp */, ARM::VRINTPNQh, Convert__Reg1_1__Reg1_2, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR }, },
14213 { 3425 /* vrintp */, ARM::VRINTPNDh, Convert__Reg1_1__Reg1_2, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR }, },
14231 { 3439 /* vrintx */, ARM::VRINTXNQh, Convert__Reg1_1__Reg1_2, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR }, },
14232 { 3439 /* vrintx */, ARM::VRINTXNDh, Convert__Reg1_1__Reg1_2, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR }, },
14247 { 3446 /* vrintz */, ARM::VRINTZNQh, Convert__Reg1_1__Reg1_2, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR }, },
14248 { 3446 /* vrintz */, ARM::VRINTZNDh, Convert__Reg1_1__Reg1_2, AMFBS_HasV8_HasNEON_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR }, },