reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARC/ARCGenInstrInfo.inc
 1113   { 470,	4,	1,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x2ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #470 = STB_AB_rs9
 1114   { 471,	4,	1,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #471 = STB_AW_rs9
 1115   { 472,	4,	1,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x2ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #472 = STB_DI_AB_rs9
 1116   { 473,	4,	1,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #473 = STB_DI_AW_rs9
 1122   { 479,	4,	1,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x2ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #479 = STH_AB_rs9
 1123   { 480,	4,	1,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #480 = STH_AW_rs9
 1124   { 481,	4,	1,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x2ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #481 = STH_DI_AB_rs9
 1125   { 482,	4,	1,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #482 = STH_DI_AW_rs9
 1131   { 488,	4,	1,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x2ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #488 = ST_AB_rs9
 1132   { 489,	4,	1,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #489 = ST_AW_rs9
 1133   { 490,	4,	1,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x2ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #490 = ST_DI_AB_rs9
 1134   { 491,	4,	1,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #491 = ST_DI_AW_rs9