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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/R600GenInstrInfo.inc 878 { 240, 19, 1, 0, 2, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #240 = BFE_INT_eg
879 { 241, 19, 1, 0, 2, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #241 = BFE_UINT_eg
880 { 242, 19, 1, 0, 2, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #242 = BFI_INT_eg
882 { 244, 19, 1, 0, 2, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #244 = BIT_ALIGN_INT_eg
907 { 269, 19, 1, 0, 3, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #269 = CNDE_INT
908 { 270, 19, 1, 0, 3, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #270 = CNDE_eg
909 { 271, 19, 1, 0, 3, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #271 = CNDE_r600
910 { 272, 19, 1, 0, 3, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #272 = CNDGE_INT
911 { 273, 19, 1, 0, 2, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #273 = CNDGE_eg
912 { 274, 19, 1, 0, 2, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #274 = CNDGE_r600
913 { 275, 19, 1, 0, 3, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #275 = CNDGT_INT
914 { 276, 19, 1, 0, 2, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #276 = CNDGT_eg
915 { 277, 19, 1, 0, 2, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #277 = CNDGT_r600
941 { 303, 19, 1, 0, 2, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #303 = FMA_eg
1006 { 368, 19, 1, 0, 3, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #368 = MULADD_IEEE_eg
1007 { 369, 19, 1, 0, 3, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #369 = MULADD_IEEE_r600
1008 { 370, 19, 1, 0, 2, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #370 = MULADD_INT24_cm
1009 { 371, 19, 1, 0, 2, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #371 = MULADD_UINT24_eg
1010 { 372, 19, 1, 0, 3, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #372 = MULADD_eg
1011 { 373, 19, 1, 0, 3, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #373 = MULADD_r600
1029 { 391, 19, 1, 0, 3, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #391 = MUL_LIT_eg
1030 { 392, 19, 1, 0, 3, 0|(1ULL<<MCID::Predicable), 0x4220ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #392 = MUL_LIT_r600