reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

gen/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc

17333   extern const TargetRegisterClass AGPR_32RegClass;

References

gen/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc

21718     &AMDGPU::AGPR_32RegClass,

lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

  663       for (MCPhysReg Reg : reverse(AMDGPU::AGPR_32RegClass.getRegisters())) {
  776         } else if (AMDGPU::AGPR_32RegClass.contains(Reg)) {

lib/Target/AMDGPU/SIFixSGPRCopies.cpp

  307       unsigned Opc = NewSrcRC == &AMDGPU::AGPR_32RegClass ?

lib/Target/AMDGPU/SIFoldOperands.cpp

  644     if (DestRC == &AMDGPU::AGPR_32RegClass &&
  707             auto Tmp = MRI->createVirtualRegister(&AMDGPU::AGPR_32RegClass);
  734               auto Tmp = MRI->createVirtualRegister(&AMDGPU::AGPR_32RegClass);
  749             auto Tmp = MRI->createVirtualRegister(&AMDGPU::AGPR_32RegClass);

lib/Target/AMDGPU/SIISelLowering.cpp

10613         RC = &AMDGPU::AGPR_32RegClass;
10644       RC = &AMDGPU::AGPR_32RegClass;

lib/Target/AMDGPU/SIInstrInfo.cpp

  533            AMDGPU::AGPR_32RegClass.contains(SrcReg));
  534     unsigned Opc = AMDGPU::AGPR_32RegClass.contains(SrcReg) ?
  609   if (RC == &AMDGPU::AGPR_32RegClass) {
  612            AMDGPU::AGPR_32RegClass.contains(SrcReg));

lib/Target/AMDGPU/SIMachineFunctionInfo.cpp

  344       isAGPRtoVGPR ? AMDGPU::VGPR_32RegClass : AMDGPU::AGPR_32RegClass;

lib/Target/AMDGPU/SIRegisterInfo.cpp

  204     Reg = AMDGPU::AGPR_32RegClass.getRegister(i);
  211       unsigned Reg = AMDGPU::AGPR_32RegClass.getRegister(i);
 1250     &AMDGPU::AGPR_32RegClass,
 1317     return getCommonSubClass(&AMDGPU::AGPR_32RegClass, RC) != nullptr;
 1366     return &AMDGPU::AGPR_32RegClass;
 1434       return &AMDGPU::AGPR_32RegClass;