reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenMCCodeEmitter.inc
37416     CEFBS_Has16BitInsts_HasDPP, // V_ADD_F16_dpp = 2324
37432     CEFBS_Has16BitInsts_HasDPP, // V_ADD_U16_dpp = 2340
37447     CEFBS_Has16BitInsts_HasDPP, // V_ASHRREV_I16_dpp = 2355
37472     CEFBS_Has16BitInsts_HasDPP, // V_CEIL_F16_dpp = 2380
38521     CEFBS_Has16BitInsts_HasDPP, // V_COS_F16_dpp = 3429
38537     CEFBS_Has16BitInsts_HasDPP, // V_CVT_F16_I16_dpp = 3445
38541     CEFBS_Has16BitInsts_HasDPP, // V_CVT_F16_U16_dpp = 3449
38585     CEFBS_Has16BitInsts_HasDPP, // V_CVT_I16_F16_dpp = 3493
38626     CEFBS_Has16BitInsts_HasDPP, // V_CVT_U16_F16_dpp = 3534
38663     CEFBS_Has16BitInsts_HasDPP, // V_EXP_F16_dpp = 3571
38687     CEFBS_Has16BitInsts_HasDPP, // V_FLOOR_F16_dpp = 3595
38716     CEFBS_Has16BitInsts_HasDPP, // V_FRACT_F16_dpp = 3624
38726     CEFBS_Has16BitInsts_HasDPP, // V_FREXP_EXP_I16_F16_dpp = 3634
38736     CEFBS_Has16BitInsts_HasDPP, // V_FREXP_MANT_F16_dpp = 3644
38757     CEFBS_Has16BitInsts_HasDPP, // V_LDEXP_F16_dpp = 3665
38769     CEFBS_Has16BitInsts_HasDPP, // V_LOG_F16_dpp = 3677
38781     CEFBS_Has16BitInsts_HasDPP, // V_LSHLREV_B16_dpp = 3689
38797     CEFBS_Has16BitInsts_HasDPP, // V_LSHRREV_B16_dpp = 3705
38811     CEFBS_Has16BitInsts_HasDPP, // V_MAC_F16_dpp = 3719
38850     CEFBS_Has16BitInsts_HasDPP, // V_MAX_F16_dpp = 3758
38859     CEFBS_Has16BitInsts_HasDPP, // V_MAX_I16_dpp = 3767
38871     CEFBS_Has16BitInsts_HasDPP, // V_MAX_U16_dpp = 3779
38915     CEFBS_Has16BitInsts_HasDPP, // V_MIN_F16_dpp = 3823
38924     CEFBS_Has16BitInsts_HasDPP, // V_MIN_I16_dpp = 3832
38936     CEFBS_Has16BitInsts_HasDPP, // V_MIN_U16_dpp = 3844
38972     CEFBS_Has16BitInsts_HasDPP, // V_MUL_F16_dpp = 3880
39000     CEFBS_Has16BitInsts_HasDPP, // V_MUL_LO_U16_dpp = 3908
39058     CEFBS_Has16BitInsts_HasDPP, // V_RCP_F16_dpp = 3966
39077     CEFBS_Has16BitInsts_HasDPP, // V_RNDNE_F16_dpp = 3985
39093     CEFBS_Has16BitInsts_HasDPP, // V_RSQ_F16_dpp = 4001
39121     CEFBS_Has16BitInsts_HasDPP, // V_SIN_F16_dpp = 4029
39129     CEFBS_Has16BitInsts_HasDPP, // V_SQRT_F16_dpp = 4037
39147     CEFBS_Has16BitInsts_HasDPP, // V_SUBREV_F16_dpp = 4055
39159     CEFBS_Has16BitInsts_HasDPP, // V_SUBREV_U16_dpp = 4067
39167     CEFBS_Has16BitInsts_HasDPP, // V_SUB_F16_dpp = 4075
39181     CEFBS_Has16BitInsts_HasDPP, // V_SUB_U16_dpp = 4089
39192     CEFBS_Has16BitInsts_HasDPP, // V_TRUNC_F16_dpp = 4100
47022     CEFBS_Has16BitInsts_HasDPP, // V_ADD_F16_dpp_vi = 11930
47059     CEFBS_Has16BitInsts_HasDPP, // V_ADD_U16_dpp_vi = 11967
47092     CEFBS_Has16BitInsts_HasDPP, // V_ASHRREV_I16_dpp_vi = 12000
47146     CEFBS_Has16BitInsts_HasDPP, // V_CEIL_F16_dpp_vi = 12054
48754     CEFBS_Has16BitInsts_HasDPP, // V_COS_F16_dpp_vi = 13662
48800     CEFBS_Has16BitInsts_HasDPP, // V_CVT_F16_I16_dpp_vi = 13708
48810     CEFBS_Has16BitInsts_HasDPP, // V_CVT_F16_U16_dpp_vi = 13718
48940     CEFBS_Has16BitInsts_HasDPP, // V_CVT_I16_F16_dpp_vi = 13848
49043     CEFBS_Has16BitInsts_HasDPP, // V_CVT_U16_F16_dpp_vi = 13951
49121     CEFBS_Has16BitInsts_HasDPP, // V_EXP_F16_dpp_vi = 14029
49186     CEFBS_Has16BitInsts_HasDPP, // V_FLOOR_F16_dpp_vi = 14094
49246     CEFBS_Has16BitInsts_HasDPP, // V_FRACT_F16_dpp_vi = 14154
49274     CEFBS_Has16BitInsts_HasDPP, // V_FREXP_EXP_I16_F16_dpp_vi = 14182
49302     CEFBS_Has16BitInsts_HasDPP, // V_FREXP_MANT_F16_dpp_vi = 14210
49356     CEFBS_Has16BitInsts_HasDPP, // V_LDEXP_F16_dpp_vi = 14264
49378     CEFBS_Has16BitInsts_HasDPP, // V_LOG_F16_dpp_vi = 14286
49405     CEFBS_Has16BitInsts_HasDPP, // V_LSHLREV_B16_dpp_vi = 14313
49432     CEFBS_Has16BitInsts_HasDPP, // V_LSHRREV_B16_dpp_vi = 14340
49455     CEFBS_Has16BitInsts_HasDPP, // V_MAC_F16_dpp_vi = 14363
49537     CEFBS_Has16BitInsts_HasDPP, // V_MAX_F16_dpp_vi = 14445
49560     CEFBS_Has16BitInsts_HasDPP, // V_MAX_I16_dpp_vi = 14468
49580     CEFBS_Has16BitInsts_HasDPP, // V_MAX_U16_dpp_vi = 14488
49658     CEFBS_Has16BitInsts_HasDPP, // V_MIN_F16_dpp_vi = 14566
49681     CEFBS_Has16BitInsts_HasDPP, // V_MIN_I16_dpp_vi = 14589
49701     CEFBS_Has16BitInsts_HasDPP, // V_MIN_U16_dpp_vi = 14609
49776     CEFBS_Has16BitInsts_HasDPP, // V_MUL_F16_dpp_vi = 14684
49856     CEFBS_Has16BitInsts_HasDPP, // V_MUL_LO_U16_dpp_vi = 14764
49970     CEFBS_Has16BitInsts_HasDPP, // V_RCP_F16_dpp_vi = 14878
50016     CEFBS_Has16BitInsts_HasDPP, // V_RNDNE_F16_dpp_vi = 14924
50048     CEFBS_Has16BitInsts_HasDPP, // V_RSQ_F16_dpp_vi = 14956
50104     CEFBS_Has16BitInsts_HasDPP, // V_SIN_F16_dpp_vi = 15012
50126     CEFBS_Has16BitInsts_HasDPP, // V_SQRT_F16_dpp_vi = 15034
50190     CEFBS_Has16BitInsts_HasDPP, // V_SUBREV_F16_dpp_vi = 15098
50217     CEFBS_Has16BitInsts_HasDPP, // V_SUBREV_U16_dpp_vi = 15125
50248     CEFBS_Has16BitInsts_HasDPP, // V_SUB_F16_dpp_vi = 15156
50280     CEFBS_Has16BitInsts_HasDPP, // V_SUB_U16_dpp_vi = 15188
50301     CEFBS_Has16BitInsts_HasDPP, // V_TRUNC_F16_dpp_vi = 15209