reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

 2984   int SrsrcIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::srsrc);

lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp

  387         AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::srsrc);

lib/Target/AMDGPU/GCNHazardRecognizer.cpp

  703     int SRsrcIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::srsrc);

lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp

  298                                            AMDGPU::OpName::srsrc);

lib/Target/AMDGPU/SIFoldOperands.cpp

  598     if (TII->getNamedOperand(*UseMI, AMDGPU::OpName::srsrc)->getReg() !=

lib/Target/AMDGPU/SIInstrInfo.cpp

  217         !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::srsrc))
  328       const MachineOperand *RSrc = getNamedOperand(LdSt, AMDGPU::OpName::srsrc);
 3647       int SRsrcIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::srsrc);
 4651     MachineOperand *SRsrc = getNamedOperand(MI, AMDGPU::OpName::srsrc);
 4667       AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::srsrc);
 6023     int RSrcIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::srsrc);

lib/Target/AMDGPU/SILoadStoreOptimizer.cpp

  484     AddrOpName[NumAddresses++] = AMDGPU::OpName::srsrc;
 1170     MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc))
 1337     MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc))

lib/Target/AMDGPU/SIRegisterInfo.cpp

  597           .add(*TII->getNamedOperand(*MI, AMDGPU::OpName::srsrc))
 1049             TII->getNamedOperand(*MI, AMDGPU::OpName::srsrc)->getReg(),
 1079             TII->getNamedOperand(*MI, AMDGPU::OpName::srsrc)->getReg(),