|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
lib/Target/AMDGPU/AMDGPUMacroFusion.cpp 48 AMDGPU::OpName::src2);
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 2836 const int Src2Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2);
2903 const int Src2Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2);
3229 const int Src2Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2);
3367 const int Src2Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2);
6167 AMDGPU::OpName::src2 };
6337 AMDGPU::OpName::src2 };
6921 it, AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::src2));
lib/Target/AMDGPU/GCNDPPCombine.cpp 237 if (auto *Src2 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src2)) {
238 if (!TII->getNamedOperand(*DPPInst.getInstr(), AMDGPU::OpName::src2) ||
lib/Target/AMDGPU/GCNHazardRecognizer.cpp 1273 int SrcCIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2);
1341 Register Reg = TII.getNamedOperand(*MI, AMDGPU::OpName::src2)->getReg();
lib/Target/AMDGPU/SIFoldOperands.cpp 150 int Src2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2);
207 else if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2))
338 (int)OpNo == AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2)) {
992 bool UseCopy = TII->getNamedOperand(*MI, AMDGPU::OpName::src2)->isReg();
1096 int Src2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2);
lib/Target/AMDGPU/SIInstrInfo.cpp 2369 MachineOperand *Src2 = getNamedOperand(UseMI, AMDGPU::OpName::src2);
2410 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2));
2487 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2));
2649 const MachineOperand *Src2 = getNamedOperand(MI, AMDGPU::OpName::src2);
2943 AMDGPU::OpName::src2))
2989 const MachineOperand *Src2 = getNamedOperand(MI, AMDGPU::OpName::src2);
3082 const MachineOperand *Src2 = getNamedOperand(MI, AMDGPU::OpName::src2);
3085 int Op32Src2Idx = AMDGPU::getNamedOperandIdx(Op32, AMDGPU::OpName::src2);
3201 int Src2Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2);
4131 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2)
6007 int Src2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2);
lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp 248 MachineOperand *CC = TII->getNamedOperand(*Sel, AMDGPU::OpName::src2);
lib/Target/AMDGPU/SIPeepholeSDWA.cpp 653 MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2);
903 MachineOperand *CarryIn = TII->getNamedOperand(MISucc, AMDGPU::OpName::src2);
1057 MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2);
lib/Target/AMDGPU/SIShrinkInstructions.cpp 741 TII->getNamedOperand(MI, AMDGPU::OpName::src2);
759 AMDGPU::OpName::src2);