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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 2835 const int Src1Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1);
2902 const int Src1Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1);
3228 const int Src1Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1);
3309 const int Src1Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1);
3366 const int Src1Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1);
6166 AMDGPU::OpName::src1,
6336 AMDGPU::OpName::src1,
lib/Target/AMDGPU/GCNDPPCombine.cpp 227 if (auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1)) {
320 auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1);
514 Use == TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1)) {
lib/Target/AMDGPU/GCNHazardRecognizer.cpp 790 TII->getNamedOperand(*RWLane, AMDGPU::OpName::src1);
lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp 614 AMDGPU::OpName::src1))
675 AMDGPU::OpName::src1))
lib/Target/AMDGPU/SIFixSGPRCopies.cpp 702 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src1);
lib/Target/AMDGPU/SIFoldOperands.cpp 205 else if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1))
977 int Src1Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1);
1087 const MachineOperand *Src1 = TII->getNamedOperand(*MI, AMDGPU::OpName::src1);
1099 MI->RemoveOperand(AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1));
1252 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
1368 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
1397 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
lib/Target/AMDGPU/SIISelLowering.cpp10403 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1) }) {
lib/Target/AMDGPU/SIInstrInfo.cpp 1677 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1) ==
1733 int Src1Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1);
2368 MachineOperand *Src1 = getNamedOperand(UseMI, AMDGPU::OpName::src1);
2646 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1);
3005 = getNamedOperand(MI, AMDGPU::OpName::src1);
3025 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1);
3078 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1);
3200 int Src1Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1);
4020 int Src1Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1);
4130 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1),
6000 int Src1Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1);
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp 1485 const auto *Src1 = TII->getNamedOperand(*BaseLoDef, AMDGPU::OpName::src1);
1497 Src1 = TII->getNamedOperand(*BaseHiDef, AMDGPU::OpName::src1);
lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp 111 auto Op = TII.getNamedOperand(MI, AMDGPU::OpName::src1);
231 MachineOperand *Op2 = TII->getNamedOperand(*Cmp, AMDGPU::OpName::src1);
247 Op2 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src1);
lib/Target/AMDGPU/SIPeepholeSDWA.cpp 342 } else if (TII->getNamedOperand(*MI, AMDGPU::OpName::src1) == SrcOp) {
380 Src = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
575 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
613 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
648 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
695 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
750 MachineOperand *OrOther = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
754 OrSDWA = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
927 NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::src1));
933 NewInst.add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::src1));
1040 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
1043 AMDGPU::getNamedOperandIdx(SDWAOpcode, AMDGPU::OpName::src1) != -1 &&