|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc28474 /* 59694*/ OPC_MorphNodeTo2, TARGET_VAL(AMDGPU::V_ADD_I32_e64), 0,
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc56220 case AMDGPU::V_ADD_I32_e64:
95759 { AMDGPU::V_ADD_I32_e64, AMDGPU::V_ADD_I32_e64_gfx6_gfx7, AMDGPU::V_ADD_U32_e64_vi, (uint16_t)-1U, (uint16_t)-1U, (uint16_t)-1U, AMDGPU::V_ADD_CO_U32_e64_gfx9, AMDGPU::V_ADD_CO_U32_e64_gfx10, (uint16_t)-1U },
98295 { AMDGPU::V_ADD_I32_e64, AMDGPU::V_ADD_I32_e32 },
98878 { AMDGPU::V_ADD_I32_e32, AMDGPU::V_ADD_I32_e64 },
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 1060 AMDGPU::V_ADD_I32_e64 : AMDGPU::V_SUB_I32_e64;
1705 AMDGPU::V_ADD_I32_e64, DL, VTs,
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 328 const unsigned Opc = Sub ? AMDGPU::V_SUB_I32_e64 : AMDGPU::V_ADD_I32_e64;
366 BuildMI(*BB, &I, DL, TII.get(AMDGPU::V_ADD_I32_e64), DstLo)
409 unsigned NewOpc = IsAdd ? AMDGPU::V_ADD_I32_e64 : AMDGPU::V_SUB_I32_e64;
lib/Target/AMDGPU/GCNDPPCombine.cpp 268 case AMDGPU::V_ADD_I32_e64:
lib/Target/AMDGPU/SIFixupVectorISel.cpp 109 case AMDGPU::V_ADD_I32_e64:
lib/Target/AMDGPU/SIFoldOperands.cpp 400 if ((Opc == AMDGPU::V_ADD_I32_e64 ||
lib/Target/AMDGPU/SIInstrInfo.cpp 4711 BuildMI(MBB, MI, DL, get(AMDGPU::V_ADD_I32_e64), NewVAddrLo)
5378 unsigned LoOpc = IsAdd ? AMDGPU::V_ADD_I32_e64 : AMDGPU::V_SUB_I32_e64;
6200 return BuildMI(MBB, I, DL, get(AMDGPU::V_ADD_I32_e64), DestReg)
6217 return BuildMI(MBB, I, DL, get(AMDGPU::V_ADD_I32_e64), DestReg)
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp 1397 BuildMI(*MBB, MBBI, DL, TII->get(AMDGPU::V_ADD_I32_e64), DestSub0)
1480 if (!BaseLoDef || BaseLoDef->getOpcode() != AMDGPU::V_ADD_I32_e64 ||
lib/Target/AMDGPU/SIPeepholeSDWA.cpp 883 assert((Opc == AMDGPU::V_ADD_I32_e64 || Opc == AMDGPU::V_SUB_I32_e64) &&
1228 (PotentialMI->getOpcode() == AMDGPU::V_ADD_I32_e64 ||