|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc17261 { 1199, 5, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo97, -1 ,nullptr }, // Inst #1199 = DS_READ_I8_D16
17262 { 1200, 5, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo97, -1 ,nullptr }, // Inst #1200 = DS_READ_I8_D16_HI
17265 { 1203, 5, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo97, -1 ,nullptr }, // Inst #1203 = DS_READ_U16_D16
17266 { 1204, 5, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo97, -1 ,nullptr }, // Inst #1204 = DS_READ_U16_D16_HI
17269 { 1207, 5, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo97, -1 ,nullptr }, // Inst #1207 = DS_READ_U8_D16
17270 { 1208, 5, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo97, -1 ,nullptr }, // Inst #1208 = DS_READ_U8_D16_HI