|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc17241 { 1179, 5, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo92, -1 ,nullptr }, // Inst #1179 = DS_READ2ST64_B32
17242 { 1180, 5, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo92, -1 ,nullptr }, // Inst #1180 = DS_READ2ST64_B32_gfx9
17245 { 1183, 5, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo92, -1 ,nullptr }, // Inst #1183 = DS_READ2_B32
17246 { 1184, 5, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo92, -1 ,nullptr }, // Inst #1184 = DS_READ2_B32_gfx9
21807 { 5745, 5, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr }, // Inst #5745 = DS_READ2ST64_B32_gfx10
21808 { 5746, 5, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr }, // Inst #5746 = DS_READ2ST64_B32_gfx6_gfx7
21809 { 5747, 5, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr }, // Inst #5747 = DS_READ2ST64_B32_vi
21813 { 5751, 5, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr }, // Inst #5751 = DS_READ2_B32_gfx10
21814 { 5752, 5, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr }, // Inst #5752 = DS_READ2_B32_gfx6_gfx7
21815 { 5753, 5, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr }, // Inst #5753 = DS_READ2_B32_vi