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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc17125 { 1063, 6, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #1063 = DS_CMPST_RTN_B64
17126 { 1064, 6, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #1064 = DS_CMPST_RTN_B64_gfx9
17129 { 1067, 6, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #1067 = DS_CMPST_RTN_F64
17130 { 1068, 6, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #1068 = DS_CMPST_RTN_F64_gfx9
17226 { 1164, 6, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #1164 = DS_MSKOR_RTN_B64
17227 { 1165, 6, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #1165 = DS_MSKOR_RTN_B64_gfx9
21592 { 5530, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #5530 = DS_CMPST_RTN_B64_gfx10
21593 { 5531, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #5531 = DS_CMPST_RTN_B64_gfx6_gfx7
21594 { 5532, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #5532 = DS_CMPST_RTN_B64_vi
21598 { 5536, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #5536 = DS_CMPST_RTN_F64_gfx10
21599 { 5537, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #5537 = DS_CMPST_RTN_F64_gfx6_gfx7
21600 { 5538, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #5538 = DS_CMPST_RTN_F64_vi
21778 { 5716, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #5716 = DS_MSKOR_RTN_B64_gfx10
21779 { 5717, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #5717 = DS_MSKOR_RTN_B64_gfx6_gfx7
21780 { 5718, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #5718 = DS_MSKOR_RTN_B64_vi