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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc17117 { 1055, 5, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #1055 = DS_CMPST_B64
17118 { 1056, 5, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #1056 = DS_CMPST_B64_gfx9
17121 { 1059, 5, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #1059 = DS_CMPST_F64
17122 { 1060, 5, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #1060 = DS_CMPST_F64_gfx9
17222 { 1160, 5, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #1160 = DS_MSKOR_B64
17223 { 1161, 5, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #1161 = DS_MSKOR_B64_gfx9
17355 { 1293, 5, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x80500200000ULL, ImplicitList5, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #1293 = FLAT_ATOMIC_CMPSWAP_RTN
17363 { 1301, 5, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x20080500200000ULL, ImplicitList5, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #1301 = FLAT_ATOMIC_FCMPSWAP_RTN
17452 { 1390, 5, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x8080100200000ULL, ImplicitList2, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #1390 = GLOBAL_ATOMIC_CMPSWAP_RTN
21580 { 5518, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #5518 = DS_CMPST_B64_gfx10
21581 { 5519, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #5519 = DS_CMPST_B64_gfx6_gfx7
21582 { 5520, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #5520 = DS_CMPST_B64_vi
21586 { 5524, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #5524 = DS_CMPST_F64_gfx10
21587 { 5525, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #5525 = DS_CMPST_F64_gfx6_gfx7
21588 { 5526, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #5526 = DS_CMPST_F64_vi
21772 { 5710, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #5710 = DS_MSKOR_B64_gfx10
21773 { 5711, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #5711 = DS_MSKOR_B64_gfx6_gfx7
21774 { 5712, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #5712 = DS_MSKOR_B64_vi
22007 { 5945, 5, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80500200000ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #5945 = FLAT_ATOMIC_CMPSWAP_RTN_ci
22008 { 5946, 5, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80500200000ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #5946 = FLAT_ATOMIC_CMPSWAP_RTN_gfx10
22009 { 5947, 5, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80500200000ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #5947 = FLAT_ATOMIC_CMPSWAP_RTN_vi
22031 { 5969, 5, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20080500200000ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #5969 = FLAT_ATOMIC_FCMPSWAP_RTN_ci
22032 { 5970, 5, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20080500200000ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #5970 = FLAT_ATOMIC_FCMPSWAP_RTN_gfx10
22255 { 6193, 5, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #6193 = GLOBAL_ATOMIC_CMPSWAP_RTN_gfx10
22256 { 6194, 5, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr }, // Inst #6194 = GLOBAL_ATOMIC_CMPSWAP_RTN_vi