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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc17101 { 1039, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1039 = DS_ADD_U64
17102 { 1040, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1040 = DS_ADD_U64_gfx9
17105 { 1043, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1043 = DS_AND_B64
17106 { 1044, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1044 = DS_AND_B64_gfx9
17142 { 1080, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1080 = DS_DEC_U64
17143 { 1081, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1081 = DS_DEC_U64_gfx9
17158 { 1096, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1096 = DS_INC_U64
17159 { 1097, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1097 = DS_INC_U64_gfx9
17162 { 1100, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1100 = DS_MAX_F64
17163 { 1101, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1101 = DS_MAX_F64_gfx9
17166 { 1104, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1104 = DS_MAX_I64
17167 { 1105, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1105 = DS_MAX_I64_gfx9
17188 { 1126, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1126 = DS_MAX_U64
17189 { 1127, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1127 = DS_MAX_U64_gfx9
17192 { 1130, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1130 = DS_MIN_F64
17193 { 1131, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1131 = DS_MIN_F64_gfx9
17196 { 1134, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1134 = DS_MIN_I64
17197 { 1135, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1135 = DS_MIN_I64_gfx9
17218 { 1156, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1156 = DS_MIN_U64
17219 { 1157, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1157 = DS_MIN_U64_gfx9
17232 { 1170, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1170 = DS_OR_B64
17233 { 1171, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1171 = DS_OR_B64_gfx9
17280 { 1218, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1218 = DS_RSUB_U64
17281 { 1219, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1219 = DS_RSUB_U64_gfx9
17290 { 1228, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1228 = DS_SUB_U64
17291 { 1229, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1229 = DS_SUB_U64_gfx9
17311 { 1249, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1249 = DS_WRITE_B64
17312 { 1250, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1250 = DS_WRITE_B64_gfx9
17334 { 1272, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1272 = DS_XOR_B64
17335 { 1273, 4, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList2, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #1273 = DS_XOR_B64_gfx9
21551 { 5489, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5489 = DS_ADD_U64_gfx10
21552 { 5490, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5490 = DS_ADD_U64_gfx6_gfx7
21553 { 5491, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5491 = DS_ADD_U64_vi
21557 { 5495, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5495 = DS_AND_B64_gfx10
21558 { 5496, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5496 = DS_AND_B64_gfx6_gfx7
21559 { 5497, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5497 = DS_AND_B64_vi
21622 { 5560, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5560 = DS_DEC_U64_gfx10
21623 { 5561, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5561 = DS_DEC_U64_gfx6_gfx7
21624 { 5562, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5562 = DS_DEC_U64_vi
21658 { 5596, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5596 = DS_INC_U64_gfx10
21659 { 5597, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5597 = DS_INC_U64_gfx6_gfx7
21660 { 5598, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5598 = DS_INC_U64_vi
21664 { 5602, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5602 = DS_MAX_F64_gfx10
21665 { 5603, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5603 = DS_MAX_F64_gfx6_gfx7
21666 { 5604, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5604 = DS_MAX_F64_vi
21670 { 5608, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5608 = DS_MAX_I64_gfx10
21671 { 5609, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5609 = DS_MAX_I64_gfx6_gfx7
21672 { 5610, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5610 = DS_MAX_I64_vi
21712 { 5650, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5650 = DS_MAX_U64_gfx10
21713 { 5651, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5651 = DS_MAX_U64_gfx6_gfx7
21714 { 5652, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5652 = DS_MAX_U64_vi
21718 { 5656, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5656 = DS_MIN_F64_gfx10
21719 { 5657, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5657 = DS_MIN_F64_gfx6_gfx7
21720 { 5658, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5658 = DS_MIN_F64_vi
21724 { 5662, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5662 = DS_MIN_I64_gfx10
21725 { 5663, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5663 = DS_MIN_I64_gfx6_gfx7
21726 { 5664, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5664 = DS_MIN_I64_vi
21766 { 5704, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5704 = DS_MIN_U64_gfx10
21767 { 5705, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5705 = DS_MIN_U64_gfx6_gfx7
21768 { 5706, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5706 = DS_MIN_U64_vi
21790 { 5728, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5728 = DS_OR_B64_gfx10
21791 { 5729, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5729 = DS_OR_B64_gfx6_gfx7
21792 { 5730, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5730 = DS_OR_B64_vi
21872 { 5810, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5810 = DS_RSUB_U64_gfx10
21873 { 5811, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5811 = DS_RSUB_U64_gfx6_gfx7
21874 { 5812, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5812 = DS_RSUB_U64_vi
21890 { 5828, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5828 = DS_SUB_U64_gfx10
21891 { 5829, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5829 = DS_SUB_U64_gfx6_gfx7
21892 { 5830, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5830 = DS_SUB_U64_vi
21924 { 5862, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5862 = DS_WRITE_B64_gfx10
21925 { 5863, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5863 = DS_WRITE_B64_gfx6_gfx7
21926 { 5864, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5864 = DS_WRITE_B64_vi
21962 { 5900, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5900 = DS_XOR_B64_gfx10
21963 { 5901, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5901 = DS_XOR_B64_gfx6_gfx7
21964 { 5902, 4, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #5902 = DS_XOR_B64_vi