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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc17096 { 1034, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1034 = DS_ADD_SRC2_F32
17097 { 1035, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1035 = DS_ADD_SRC2_U32
17098 { 1036, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1036 = DS_ADD_SRC2_U64
17111 { 1049, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1049 = DS_AND_SRC2_B32
17112 { 1050, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1050 = DS_AND_SRC2_B64
17113 { 1051, 3, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1051 = DS_APPEND
17133 { 1071, 3, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1071 = DS_CONSUME
17138 { 1076, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1076 = DS_DEC_SRC2_U32
17139 { 1077, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1077 = DS_DEC_SRC2_U64
17144 { 1082, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1082 = DS_GWS_BARRIER
17145 { 1083, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1083 = DS_GWS_INIT
17146 { 1084, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1084 = DS_GWS_SEMA_BR
17154 { 1092, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1092 = DS_INC_SRC2_U32
17155 { 1093, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1093 = DS_INC_SRC2_U64
17180 { 1118, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1118 = DS_MAX_SRC2_F32
17181 { 1119, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1119 = DS_MAX_SRC2_F64
17182 { 1120, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1120 = DS_MAX_SRC2_I32
17183 { 1121, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1121 = DS_MAX_SRC2_I64
17184 { 1122, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1122 = DS_MAX_SRC2_U32
17185 { 1123, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1123 = DS_MAX_SRC2_U64
17210 { 1148, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1148 = DS_MIN_SRC2_F32
17211 { 1149, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1149 = DS_MIN_SRC2_F64
17212 { 1150, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1150 = DS_MIN_SRC2_I32
17213 { 1151, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1151 = DS_MIN_SRC2_I64
17214 { 1152, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1152 = DS_MIN_SRC2_U32
17215 { 1153, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1153 = DS_MIN_SRC2_U64
17238 { 1176, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1176 = DS_OR_SRC2_B32
17239 { 1177, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1177 = DS_OR_SRC2_B64
17249 { 1187, 3, 1, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1187 = DS_READ_ADDTID_B32
17276 { 1214, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1214 = DS_RSUB_SRC2_U32
17277 { 1215, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1215 = DS_RSUB_SRC2_U64
17286 { 1224, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1224 = DS_SUB_SRC2_U32
17287 { 1225, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1225 = DS_SUB_SRC2_U64
17303 { 1241, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1241 = DS_WRITE_ADDTID_B32
17318 { 1256, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1256 = DS_WRITE_SRC2_B32
17319 { 1257, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1257 = DS_WRITE_SRC2_B64
17340 { 1278, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1278 = DS_XOR_SRC2_B32
17341 { 1279, 3, 0, 8, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80400400000ULL, ImplicitList4, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1279 = DS_XOR_SRC2_B64
21540 { 5478, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5478 = DS_ADD_SRC2_F32_gfx10
21541 { 5479, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5479 = DS_ADD_SRC2_F32_vi
21542 { 5480, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5480 = DS_ADD_SRC2_U32_gfx10
21543 { 5481, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5481 = DS_ADD_SRC2_U32_gfx6_gfx7
21544 { 5482, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5482 = DS_ADD_SRC2_U32_vi
21545 { 5483, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5483 = DS_ADD_SRC2_U64_gfx10
21546 { 5484, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5484 = DS_ADD_SRC2_U64_gfx6_gfx7
21547 { 5485, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5485 = DS_ADD_SRC2_U64_vi
21566 { 5504, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5504 = DS_AND_SRC2_B32_gfx10
21567 { 5505, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5505 = DS_AND_SRC2_B32_gfx6_gfx7
21568 { 5506, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5506 = DS_AND_SRC2_B32_vi
21569 { 5507, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5507 = DS_AND_SRC2_B64_gfx10
21570 { 5508, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5508 = DS_AND_SRC2_B64_gfx6_gfx7
21571 { 5509, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5509 = DS_AND_SRC2_B64_vi
21572 { 5510, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5510 = DS_APPEND_gfx10
21573 { 5511, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5511 = DS_APPEND_gfx6_gfx7
21574 { 5512, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5512 = DS_APPEND_vi
21604 { 5542, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5542 = DS_CONSUME_gfx10
21605 { 5543, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5543 = DS_CONSUME_gfx6_gfx7
21606 { 5544, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5544 = DS_CONSUME_vi
21613 { 5551, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5551 = DS_DEC_SRC2_U32_gfx10
21614 { 5552, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5552 = DS_DEC_SRC2_U32_gfx6_gfx7
21615 { 5553, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5553 = DS_DEC_SRC2_U32_vi
21616 { 5554, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5554 = DS_DEC_SRC2_U64_gfx10
21617 { 5555, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5555 = DS_DEC_SRC2_U64_gfx6_gfx7
21618 { 5556, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5556 = DS_DEC_SRC2_U64_vi
21625 { 5563, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5563 = DS_GWS_BARRIER_gfx10
21626 { 5564, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5564 = DS_GWS_BARRIER_gfx6_gfx7
21627 { 5565, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5565 = DS_GWS_BARRIER_vi
21628 { 5566, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5566 = DS_GWS_INIT_gfx10
21629 { 5567, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5567 = DS_GWS_INIT_gfx6_gfx7
21630 { 5568, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5568 = DS_GWS_INIT_vi
21631 { 5569, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5569 = DS_GWS_SEMA_BR_gfx10
21632 { 5570, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5570 = DS_GWS_SEMA_BR_gfx6_gfx7
21633 { 5571, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5571 = DS_GWS_SEMA_BR_vi
21649 { 5587, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5587 = DS_INC_SRC2_U32_gfx10
21650 { 5588, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5588 = DS_INC_SRC2_U32_gfx6_gfx7
21651 { 5589, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5589 = DS_INC_SRC2_U32_vi
21652 { 5590, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5590 = DS_INC_SRC2_U64_gfx10
21653 { 5591, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5591 = DS_INC_SRC2_U64_gfx6_gfx7
21654 { 5592, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5592 = DS_INC_SRC2_U64_vi
21691 { 5629, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5629 = DS_MAX_SRC2_F32_gfx10
21692 { 5630, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5630 = DS_MAX_SRC2_F32_gfx6_gfx7
21693 { 5631, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5631 = DS_MAX_SRC2_F32_vi
21694 { 5632, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5632 = DS_MAX_SRC2_F64_gfx10
21695 { 5633, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5633 = DS_MAX_SRC2_F64_gfx6_gfx7
21696 { 5634, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5634 = DS_MAX_SRC2_F64_vi
21697 { 5635, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5635 = DS_MAX_SRC2_I32_gfx10
21698 { 5636, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5636 = DS_MAX_SRC2_I32_gfx6_gfx7
21699 { 5637, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5637 = DS_MAX_SRC2_I32_vi
21700 { 5638, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5638 = DS_MAX_SRC2_I64_gfx10
21701 { 5639, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5639 = DS_MAX_SRC2_I64_gfx6_gfx7
21702 { 5640, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5640 = DS_MAX_SRC2_I64_vi
21703 { 5641, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5641 = DS_MAX_SRC2_U32_gfx10
21704 { 5642, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5642 = DS_MAX_SRC2_U32_gfx6_gfx7
21705 { 5643, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5643 = DS_MAX_SRC2_U32_vi
21706 { 5644, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5644 = DS_MAX_SRC2_U64_gfx10
21707 { 5645, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5645 = DS_MAX_SRC2_U64_gfx6_gfx7
21708 { 5646, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5646 = DS_MAX_SRC2_U64_vi
21745 { 5683, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5683 = DS_MIN_SRC2_F32_gfx10
21746 { 5684, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5684 = DS_MIN_SRC2_F32_gfx6_gfx7
21747 { 5685, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5685 = DS_MIN_SRC2_F32_vi
21748 { 5686, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5686 = DS_MIN_SRC2_F64_gfx10
21749 { 5687, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5687 = DS_MIN_SRC2_F64_gfx6_gfx7
21750 { 5688, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5688 = DS_MIN_SRC2_F64_vi
21751 { 5689, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5689 = DS_MIN_SRC2_I32_gfx10
21752 { 5690, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5690 = DS_MIN_SRC2_I32_gfx6_gfx7
21753 { 5691, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5691 = DS_MIN_SRC2_I32_vi
21754 { 5692, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5692 = DS_MIN_SRC2_I64_gfx10
21755 { 5693, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5693 = DS_MIN_SRC2_I64_gfx6_gfx7
21756 { 5694, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5694 = DS_MIN_SRC2_I64_vi
21757 { 5695, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5695 = DS_MIN_SRC2_U32_gfx10
21758 { 5696, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5696 = DS_MIN_SRC2_U32_gfx6_gfx7
21759 { 5697, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5697 = DS_MIN_SRC2_U32_vi
21760 { 5698, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5698 = DS_MIN_SRC2_U64_gfx10
21761 { 5699, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5699 = DS_MIN_SRC2_U64_gfx6_gfx7
21762 { 5700, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5700 = DS_MIN_SRC2_U64_vi
21799 { 5737, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5737 = DS_OR_SRC2_B32_gfx10
21800 { 5738, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5738 = DS_OR_SRC2_B32_gfx6_gfx7
21801 { 5739, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5739 = DS_OR_SRC2_B32_vi
21802 { 5740, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5740 = DS_OR_SRC2_B64_gfx10
21803 { 5741, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5741 = DS_OR_SRC2_B64_gfx6_gfx7
21804 { 5742, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5742 = DS_OR_SRC2_B64_vi
21819 { 5757, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5757 = DS_READ_ADDTID_B32_gfx10
21820 { 5758, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5758 = DS_READ_ADDTID_B32_vi
21863 { 5801, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5801 = DS_RSUB_SRC2_U32_gfx10
21864 { 5802, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5802 = DS_RSUB_SRC2_U32_gfx6_gfx7
21865 { 5803, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5803 = DS_RSUB_SRC2_U32_vi
21866 { 5804, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5804 = DS_RSUB_SRC2_U64_gfx10
21867 { 5805, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5805 = DS_RSUB_SRC2_U64_gfx6_gfx7
21868 { 5806, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5806 = DS_RSUB_SRC2_U64_vi
21881 { 5819, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5819 = DS_SUB_SRC2_U32_gfx10
21882 { 5820, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5820 = DS_SUB_SRC2_U32_gfx6_gfx7
21883 { 5821, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5821 = DS_SUB_SRC2_U32_vi
21884 { 5822, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5822 = DS_SUB_SRC2_U64_gfx10
21885 { 5823, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5823 = DS_SUB_SRC2_U64_gfx6_gfx7
21886 { 5824, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5824 = DS_SUB_SRC2_U64_vi
21911 { 5849, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5849 = DS_WRITE_ADDTID_B32_gfx10
21912 { 5850, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5850 = DS_WRITE_ADDTID_B32_vi
21935 { 5873, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5873 = DS_WRITE_SRC2_B32_gfx10
21936 { 5874, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5874 = DS_WRITE_SRC2_B32_gfx6_gfx7
21937 { 5875, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5875 = DS_WRITE_SRC2_B32_vi
21938 { 5876, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5876 = DS_WRITE_SRC2_B64_gfx10
21939 { 5877, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5877 = DS_WRITE_SRC2_B64_gfx6_gfx7
21940 { 5878, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5878 = DS_WRITE_SRC2_B64_vi
21971 { 5909, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5909 = DS_XOR_SRC2_B32_gfx10
21972 { 5910, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5910 = DS_XOR_SRC2_B32_gfx6_gfx7
21973 { 5911, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5911 = DS_XOR_SRC2_B32_vi
21974 { 5912, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5912 = DS_XOR_SRC2_B64_gfx10
21975 { 5913, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5913 = DS_XOR_SRC2_B64_gfx6_gfx7
21976 { 5914, 3, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #5914 = DS_XOR_SRC2_B64_vi