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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc16782 { 720, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #720 = BUFFER_LOAD_SBYTE_D16_HI_OFFSET
16783 { 721, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #721 = BUFFER_LOAD_SBYTE_D16_HI_OFFSET_exact
16788 { 726, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #726 = BUFFER_LOAD_SBYTE_D16_OFFSET
16789 { 727, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #727 = BUFFER_LOAD_SBYTE_D16_OFFSET_exact
16815 { 753, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #753 = BUFFER_LOAD_SHORT_D16_HI_OFFSET
16816 { 754, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #754 = BUFFER_LOAD_SHORT_D16_HI_OFFSET_exact
16821 { 759, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #759 = BUFFER_LOAD_SHORT_D16_OFFSET
16822 { 760, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #760 = BUFFER_LOAD_SHORT_D16_OFFSET_exact
16854 { 792, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #792 = BUFFER_LOAD_UBYTE_D16_HI_OFFSET
16855 { 793, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #793 = BUFFER_LOAD_UBYTE_D16_HI_OFFSET_exact
16860 { 798, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #798 = BUFFER_LOAD_UBYTE_D16_OFFSET
16861 { 799, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #799 = BUFFER_LOAD_UBYTE_D16_OFFSET_exact
21186 { 5124, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #5124 = BUFFER_LOAD_SBYTE_D16_HI_OFFSET_gfx10
21187 { 5125, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #5125 = BUFFER_LOAD_SBYTE_D16_HI_OFFSET_vi
21192 { 5130, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #5130 = BUFFER_LOAD_SBYTE_D16_OFFSET_gfx10
21193 { 5131, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #5131 = BUFFER_LOAD_SBYTE_D16_OFFSET_vi
21224 { 5162, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #5162 = BUFFER_LOAD_SHORT_D16_HI_OFFSET_gfx10
21225 { 5163, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #5163 = BUFFER_LOAD_SHORT_D16_HI_OFFSET_vi
21230 { 5168, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #5168 = BUFFER_LOAD_SHORT_D16_OFFSET_gfx10
21231 { 5169, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #5169 = BUFFER_LOAD_SHORT_D16_OFFSET_vi
21270 { 5208, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #5208 = BUFFER_LOAD_UBYTE_D16_HI_OFFSET_gfx10
21271 { 5209, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #5209 = BUFFER_LOAD_UBYTE_D16_HI_OFFSET_vi
21276 { 5214, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #5214 = BUFFER_LOAD_UBYTE_D16_OFFSET_gfx10
21277 { 5215, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #5215 = BUFFER_LOAD_UBYTE_D16_OFFSET_vi