reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc
16778   { 716,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #716 = BUFFER_LOAD_SBYTE_D16_HI_IDXEN
16779   { 717,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #717 = BUFFER_LOAD_SBYTE_D16_HI_IDXEN_exact
16780   { 718,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #718 = BUFFER_LOAD_SBYTE_D16_HI_OFFEN
16781   { 719,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #719 = BUFFER_LOAD_SBYTE_D16_HI_OFFEN_exact
16784   { 722,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #722 = BUFFER_LOAD_SBYTE_D16_IDXEN
16785   { 723,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #723 = BUFFER_LOAD_SBYTE_D16_IDXEN_exact
16786   { 724,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #724 = BUFFER_LOAD_SBYTE_D16_OFFEN
16787   { 725,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #725 = BUFFER_LOAD_SBYTE_D16_OFFEN_exact
16811   { 749,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #749 = BUFFER_LOAD_SHORT_D16_HI_IDXEN
16812   { 750,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #750 = BUFFER_LOAD_SHORT_D16_HI_IDXEN_exact
16813   { 751,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #751 = BUFFER_LOAD_SHORT_D16_HI_OFFEN
16814   { 752,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #752 = BUFFER_LOAD_SHORT_D16_HI_OFFEN_exact
16817   { 755,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #755 = BUFFER_LOAD_SHORT_D16_IDXEN
16818   { 756,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #756 = BUFFER_LOAD_SHORT_D16_IDXEN_exact
16819   { 757,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #757 = BUFFER_LOAD_SHORT_D16_OFFEN
16820   { 758,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #758 = BUFFER_LOAD_SHORT_D16_OFFEN_exact
16850   { 788,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #788 = BUFFER_LOAD_UBYTE_D16_HI_IDXEN
16851   { 789,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #789 = BUFFER_LOAD_UBYTE_D16_HI_IDXEN_exact
16852   { 790,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #790 = BUFFER_LOAD_UBYTE_D16_HI_OFFEN
16853   { 791,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #791 = BUFFER_LOAD_UBYTE_D16_HI_OFFEN_exact
16856   { 794,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #794 = BUFFER_LOAD_UBYTE_D16_IDXEN
16857   { 795,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #795 = BUFFER_LOAD_UBYTE_D16_IDXEN_exact
16858   { 796,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #796 = BUFFER_LOAD_UBYTE_D16_OFFEN
16859   { 797,	11,	1,	8,	3,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #797 = BUFFER_LOAD_UBYTE_D16_OFFEN_exact
21182   { 5120,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5120 = BUFFER_LOAD_SBYTE_D16_HI_IDXEN_gfx10
21183   { 5121,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5121 = BUFFER_LOAD_SBYTE_D16_HI_IDXEN_vi
21184   { 5122,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5122 = BUFFER_LOAD_SBYTE_D16_HI_OFFEN_gfx10
21185   { 5123,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5123 = BUFFER_LOAD_SBYTE_D16_HI_OFFEN_vi
21188   { 5126,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5126 = BUFFER_LOAD_SBYTE_D16_IDXEN_gfx10
21189   { 5127,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5127 = BUFFER_LOAD_SBYTE_D16_IDXEN_vi
21190   { 5128,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5128 = BUFFER_LOAD_SBYTE_D16_OFFEN_gfx10
21191   { 5129,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5129 = BUFFER_LOAD_SBYTE_D16_OFFEN_vi
21220   { 5158,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5158 = BUFFER_LOAD_SHORT_D16_HI_IDXEN_gfx10
21221   { 5159,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5159 = BUFFER_LOAD_SHORT_D16_HI_IDXEN_vi
21222   { 5160,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5160 = BUFFER_LOAD_SHORT_D16_HI_OFFEN_gfx10
21223   { 5161,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5161 = BUFFER_LOAD_SHORT_D16_HI_OFFEN_vi
21226   { 5164,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5164 = BUFFER_LOAD_SHORT_D16_IDXEN_gfx10
21227   { 5165,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5165 = BUFFER_LOAD_SHORT_D16_IDXEN_vi
21228   { 5166,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5166 = BUFFER_LOAD_SHORT_D16_OFFEN_gfx10
21229   { 5167,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5167 = BUFFER_LOAD_SHORT_D16_OFFEN_vi
21266   { 5204,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5204 = BUFFER_LOAD_UBYTE_D16_HI_IDXEN_gfx10
21267   { 5205,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5205 = BUFFER_LOAD_UBYTE_D16_HI_IDXEN_vi
21268   { 5206,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5206 = BUFFER_LOAD_UBYTE_D16_HI_OFFEN_gfx10
21269   { 5207,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5207 = BUFFER_LOAD_UBYTE_D16_HI_OFFEN_vi
21272   { 5210,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5210 = BUFFER_LOAD_UBYTE_D16_IDXEN_gfx10
21273   { 5211,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5211 = BUFFER_LOAD_UBYTE_D16_IDXEN_vi
21274   { 5212,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5212 = BUFFER_LOAD_UBYTE_D16_OFFEN_gfx10
21275   { 5213,	11,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #5213 = BUFFER_LOAD_UBYTE_D16_OFFEN_vi