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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc16630 { 568, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #568 = BUFFER_LOAD_DWORD_LDS_ADDR64
16631 { 569, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #569 = BUFFER_LOAD_DWORD_LDS_BOTHEN
16632 { 570, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #570 = BUFFER_LOAD_DWORD_LDS_BOTHEN_exact
16756 { 694, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #694 = BUFFER_LOAD_FORMAT_X_LDS_ADDR64
16757 { 695, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #695 = BUFFER_LOAD_FORMAT_X_LDS_BOTHEN
16758 { 696, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #696 = BUFFER_LOAD_FORMAT_X_LDS_BOTHEN_exact
16792 { 730, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #730 = BUFFER_LOAD_SBYTE_LDS_ADDR64
16793 { 731, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #731 = BUFFER_LOAD_SBYTE_LDS_BOTHEN
16794 { 732, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #732 = BUFFER_LOAD_SBYTE_LDS_BOTHEN_exact
16828 { 766, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #766 = BUFFER_LOAD_SSHORT_LDS_ADDR64
16829 { 767, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #767 = BUFFER_LOAD_SSHORT_LDS_BOTHEN
16830 { 768, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #768 = BUFFER_LOAD_SSHORT_LDS_BOTHEN_exact
16864 { 802, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #802 = BUFFER_LOAD_UBYTE_LDS_ADDR64
16865 { 803, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #803 = BUFFER_LOAD_UBYTE_LDS_BOTHEN
16866 { 804, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #804 = BUFFER_LOAD_UBYTE_LDS_BOTHEN_exact
16882 { 820, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #820 = BUFFER_LOAD_USHORT_LDS_ADDR64
16883 { 821, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #821 = BUFFER_LOAD_USHORT_LDS_BOTHEN
16884 { 822, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList3, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #822 = BUFFER_LOAD_USHORT_LDS_BOTHEN_exact
21038 { 4976, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #4976 = BUFFER_LOAD_DWORD_LDS_ADDR64_gfx6_gfx7
21039 { 4977, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #4977 = BUFFER_LOAD_DWORD_LDS_BOTHEN_gfx10
21040 { 4978, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #4978 = BUFFER_LOAD_DWORD_LDS_BOTHEN_gfx6_gfx7
21041 { 4979, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #4979 = BUFFER_LOAD_DWORD_LDS_BOTHEN_vi
21155 { 5093, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5093 = BUFFER_LOAD_FORMAT_X_LDS_ADDR64_gfx6_gfx7
21156 { 5094, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5094 = BUFFER_LOAD_FORMAT_X_LDS_BOTHEN_gfx10
21157 { 5095, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5095 = BUFFER_LOAD_FORMAT_X_LDS_BOTHEN_gfx6_gfx7
21158 { 5096, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5096 = BUFFER_LOAD_FORMAT_X_LDS_BOTHEN_vi
21197 { 5135, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5135 = BUFFER_LOAD_SBYTE_LDS_ADDR64_gfx6_gfx7
21198 { 5136, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5136 = BUFFER_LOAD_SBYTE_LDS_BOTHEN_gfx10
21199 { 5137, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5137 = BUFFER_LOAD_SBYTE_LDS_BOTHEN_gfx6_gfx7
21200 { 5138, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5138 = BUFFER_LOAD_SBYTE_LDS_BOTHEN_vi
21239 { 5177, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5177 = BUFFER_LOAD_SSHORT_LDS_ADDR64_gfx6_gfx7
21240 { 5178, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5178 = BUFFER_LOAD_SSHORT_LDS_BOTHEN_gfx10
21241 { 5179, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5179 = BUFFER_LOAD_SSHORT_LDS_BOTHEN_gfx6_gfx7
21242 { 5180, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5180 = BUFFER_LOAD_SSHORT_LDS_BOTHEN_vi
21281 { 5219, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5219 = BUFFER_LOAD_UBYTE_LDS_ADDR64_gfx6_gfx7
21282 { 5220, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5220 = BUFFER_LOAD_UBYTE_LDS_BOTHEN_gfx10
21283 { 5221, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5221 = BUFFER_LOAD_UBYTE_LDS_BOTHEN_gfx6_gfx7
21284 { 5222, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5222 = BUFFER_LOAD_UBYTE_LDS_BOTHEN_vi
21307 { 5245, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5245 = BUFFER_LOAD_USHORT_LDS_ADDR64_gfx6_gfx7
21308 { 5246, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5246 = BUFFER_LOAD_USHORT_LDS_BOTHEN_gfx10
21309 { 5247, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5247 = BUFFER_LOAD_USHORT_LDS_BOTHEN_gfx6_gfx7
21310 { 5248, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #5248 = BUFFER_LOAD_USHORT_LDS_BOTHEN_vi