|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc16625 { 563, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #563 = BUFFER_LOAD_DWORD_ADDR64
16626 { 564, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #564 = BUFFER_LOAD_DWORD_BOTHEN
16627 { 565, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #565 = BUFFER_LOAD_DWORD_BOTHEN_exact
16643 { 581, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #581 = BUFFER_LOAD_FORMAT_D16_HI_X_ADDR64
16644 { 582, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #582 = BUFFER_LOAD_FORMAT_D16_HI_X_BOTHEN
16645 { 583, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #583 = BUFFER_LOAD_FORMAT_D16_HI_X_BOTHEN_exact
16688 { 626, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4080300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #626 = BUFFER_LOAD_FORMAT_D16_XY_ADDR64
16689 { 627, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4080300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #627 = BUFFER_LOAD_FORMAT_D16_XY_BOTHEN
16690 { 628, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4081300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #628 = BUFFER_LOAD_FORMAT_D16_XY_BOTHEN_exact
16706 { 644, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4080300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #644 = BUFFER_LOAD_FORMAT_D16_X_ADDR64
16707 { 645, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4080300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #645 = BUFFER_LOAD_FORMAT_D16_X_BOTHEN
16708 { 646, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4081300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #646 = BUFFER_LOAD_FORMAT_D16_X_BOTHEN_exact
16715 { 653, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4080300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #653 = BUFFER_LOAD_FORMAT_D16_X_gfx80_ADDR64
16716 { 654, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4080300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #654 = BUFFER_LOAD_FORMAT_D16_X_gfx80_BOTHEN
16717 { 655, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4081300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #655 = BUFFER_LOAD_FORMAT_D16_X_gfx80_BOTHEN_exact
16751 { 689, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #689 = BUFFER_LOAD_FORMAT_X_ADDR64
16752 { 690, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #690 = BUFFER_LOAD_FORMAT_X_BOTHEN
16753 { 691, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #691 = BUFFER_LOAD_FORMAT_X_BOTHEN_exact
16769 { 707, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #707 = BUFFER_LOAD_SBYTE_ADDR64
16770 { 708, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #708 = BUFFER_LOAD_SBYTE_BOTHEN
16771 { 709, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #709 = BUFFER_LOAD_SBYTE_BOTHEN_exact
16823 { 761, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #761 = BUFFER_LOAD_SSHORT_ADDR64
16824 { 762, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #762 = BUFFER_LOAD_SSHORT_BOTHEN
16825 { 763, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #763 = BUFFER_LOAD_SSHORT_BOTHEN_exact
16841 { 779, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #779 = BUFFER_LOAD_UBYTE_ADDR64
16842 { 780, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #780 = BUFFER_LOAD_UBYTE_BOTHEN
16843 { 781, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #781 = BUFFER_LOAD_UBYTE_BOTHEN_exact
16877 { 815, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #815 = BUFFER_LOAD_USHORT_ADDR64
16878 { 816, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #816 = BUFFER_LOAD_USHORT_BOTHEN
16879 { 817, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #817 = BUFFER_LOAD_USHORT_BOTHEN_exact
16895 { 833, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #833 = BUFFER_STORE_BYTE_ADDR64
16896 { 834, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #834 = BUFFER_STORE_BYTE_BOTHEN
16897 { 835, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #835 = BUFFER_STORE_BYTE_BOTHEN_exact
16898 { 836, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #836 = BUFFER_STORE_BYTE_D16_HI_ADDR64
16899 { 837, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #837 = BUFFER_STORE_BYTE_D16_HI_BOTHEN
16900 { 838, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #838 = BUFFER_STORE_BYTE_D16_HI_BOTHEN_exact
16940 { 878, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #878 = BUFFER_STORE_DWORD_ADDR64
16941 { 879, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #879 = BUFFER_STORE_DWORD_BOTHEN
16942 { 880, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #880 = BUFFER_STORE_DWORD_BOTHEN_exact
16949 { 887, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #887 = BUFFER_STORE_FORMAT_D16_HI_X_ADDR64
16950 { 888, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #888 = BUFFER_STORE_FORMAT_D16_HI_X_BOTHEN
16951 { 889, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #889 = BUFFER_STORE_FORMAT_D16_HI_X_BOTHEN_exact
16994 { 932, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4080300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #932 = BUFFER_STORE_FORMAT_D16_XY_ADDR64
16995 { 933, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4080300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #933 = BUFFER_STORE_FORMAT_D16_XY_BOTHEN
16996 { 934, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4081300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #934 = BUFFER_STORE_FORMAT_D16_XY_BOTHEN_exact
17012 { 950, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4080300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #950 = BUFFER_STORE_FORMAT_D16_X_ADDR64
17013 { 951, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4080300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #951 = BUFFER_STORE_FORMAT_D16_X_BOTHEN
17014 { 952, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4081300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #952 = BUFFER_STORE_FORMAT_D16_X_BOTHEN_exact
17021 { 959, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4080300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #959 = BUFFER_STORE_FORMAT_D16_X_gfx80_ADDR64
17022 { 960, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4080300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #960 = BUFFER_STORE_FORMAT_D16_X_gfx80_BOTHEN
17023 { 961, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4081300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #961 = BUFFER_STORE_FORMAT_D16_X_gfx80_BOTHEN_exact
17057 { 995, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #995 = BUFFER_STORE_FORMAT_X_ADDR64
17058 { 996, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #996 = BUFFER_STORE_FORMAT_X_BOTHEN
17059 { 997, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #997 = BUFFER_STORE_FORMAT_X_BOTHEN_exact
17067 { 1005, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #1005 = BUFFER_STORE_SHORT_ADDR64
17068 { 1006, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #1006 = BUFFER_STORE_SHORT_BOTHEN
17069 { 1007, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #1007 = BUFFER_STORE_SHORT_BOTHEN_exact
17070 { 1008, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #1008 = BUFFER_STORE_SHORT_D16_HI_ADDR64
17071 { 1009, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #1009 = BUFFER_STORE_SHORT_D16_HI_BOTHEN
17072 { 1010, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #1010 = BUFFER_STORE_SHORT_D16_HI_BOTHEN_exact
21031 { 4969, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #4969 = BUFFER_LOAD_DWORD_ADDR64_gfx6_gfx7
21032 { 4970, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #4970 = BUFFER_LOAD_DWORD_BOTHEN_gfx10
21033 { 4971, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #4971 = BUFFER_LOAD_DWORD_BOTHEN_gfx6_gfx7
21034 { 4972, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #4972 = BUFFER_LOAD_DWORD_BOTHEN_vi
21057 { 4995, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #4995 = BUFFER_LOAD_FORMAT_D16_HI_X_BOTHEN_vi
21085 { 5023, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5023 = BUFFER_LOAD_FORMAT_D16_XY_BOTHEN_gfx10
21086 { 5024, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5024 = BUFFER_LOAD_FORMAT_D16_XY_BOTHEN_vi
21097 { 5035, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5035 = BUFFER_LOAD_FORMAT_D16_X_BOTHEN_gfx10
21098 { 5036, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5036 = BUFFER_LOAD_FORMAT_D16_X_BOTHEN_vi
21105 { 5043, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5043 = BUFFER_LOAD_FORMAT_D16_X_gfx80_BOTHEN_gfx80
21148 { 5086, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5086 = BUFFER_LOAD_FORMAT_X_ADDR64_gfx6_gfx7
21149 { 5087, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5087 = BUFFER_LOAD_FORMAT_X_BOTHEN_gfx10
21150 { 5088, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5088 = BUFFER_LOAD_FORMAT_X_BOTHEN_gfx6_gfx7
21151 { 5089, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5089 = BUFFER_LOAD_FORMAT_X_BOTHEN_vi
21174 { 5112, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5112 = BUFFER_LOAD_SBYTE_ADDR64_gfx6_gfx7
21175 { 5113, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5113 = BUFFER_LOAD_SBYTE_BOTHEN_gfx10
21176 { 5114, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5114 = BUFFER_LOAD_SBYTE_BOTHEN_gfx6_gfx7
21177 { 5115, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5115 = BUFFER_LOAD_SBYTE_BOTHEN_vi
21232 { 5170, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5170 = BUFFER_LOAD_SSHORT_ADDR64_gfx6_gfx7
21233 { 5171, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5171 = BUFFER_LOAD_SSHORT_BOTHEN_gfx10
21234 { 5172, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5172 = BUFFER_LOAD_SSHORT_BOTHEN_gfx6_gfx7
21235 { 5173, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5173 = BUFFER_LOAD_SSHORT_BOTHEN_vi
21258 { 5196, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5196 = BUFFER_LOAD_UBYTE_ADDR64_gfx6_gfx7
21259 { 5197, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5197 = BUFFER_LOAD_UBYTE_BOTHEN_gfx10
21260 { 5198, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5198 = BUFFER_LOAD_UBYTE_BOTHEN_gfx6_gfx7
21261 { 5199, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5199 = BUFFER_LOAD_UBYTE_BOTHEN_vi
21300 { 5238, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5238 = BUFFER_LOAD_USHORT_ADDR64_gfx6_gfx7
21301 { 5239, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5239 = BUFFER_LOAD_USHORT_BOTHEN_gfx10
21302 { 5240, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5240 = BUFFER_LOAD_USHORT_BOTHEN_gfx6_gfx7
21303 { 5241, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5241 = BUFFER_LOAD_USHORT_BOTHEN_vi
21326 { 5264, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5264 = BUFFER_STORE_BYTE_ADDR64_gfx6_gfx7
21327 { 5265, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5265 = BUFFER_STORE_BYTE_BOTHEN_gfx10
21328 { 5266, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5266 = BUFFER_STORE_BYTE_BOTHEN_gfx6_gfx7
21329 { 5267, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5267 = BUFFER_STORE_BYTE_BOTHEN_vi
21330 { 5268, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5268 = BUFFER_STORE_BYTE_D16_HI_BOTHEN_gfx10
21331 { 5269, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5269 = BUFFER_STORE_BYTE_D16_HI_BOTHEN_vi
21386 { 5324, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5324 = BUFFER_STORE_DWORD_ADDR64_gfx6_gfx7
21387 { 5325, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5325 = BUFFER_STORE_DWORD_BOTHEN_gfx10
21388 { 5326, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5326 = BUFFER_STORE_DWORD_BOTHEN_gfx6_gfx7
21389 { 5327, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5327 = BUFFER_STORE_DWORD_BOTHEN_vi
21399 { 5337, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5337 = BUFFER_STORE_FORMAT_D16_HI_X_BOTHEN_vi
21427 { 5365, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5365 = BUFFER_STORE_FORMAT_D16_XY_BOTHEN_gfx10
21428 { 5366, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5366 = BUFFER_STORE_FORMAT_D16_XY_BOTHEN_vi
21439 { 5377, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5377 = BUFFER_STORE_FORMAT_D16_X_BOTHEN_gfx10
21440 { 5378, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5378 = BUFFER_STORE_FORMAT_D16_X_BOTHEN_vi
21447 { 5385, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5385 = BUFFER_STORE_FORMAT_D16_X_gfx80_BOTHEN_gfx80
21490 { 5428, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5428 = BUFFER_STORE_FORMAT_X_ADDR64_gfx6_gfx7
21491 { 5429, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5429 = BUFFER_STORE_FORMAT_X_BOTHEN_gfx10
21492 { 5430, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5430 = BUFFER_STORE_FORMAT_X_BOTHEN_gfx6_gfx7
21493 { 5431, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5431 = BUFFER_STORE_FORMAT_X_BOTHEN_vi
21504 { 5442, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5442 = BUFFER_STORE_SHORT_ADDR64_gfx6_gfx7
21505 { 5443, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5443 = BUFFER_STORE_SHORT_BOTHEN_gfx10
21506 { 5444, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5444 = BUFFER_STORE_SHORT_BOTHEN_gfx6_gfx7
21507 { 5445, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5445 = BUFFER_STORE_SHORT_BOTHEN_vi
21508 { 5446, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5446 = BUFFER_STORE_SHORT_D16_HI_BOTHEN_gfx10
21509 { 5447, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #5447 = BUFFER_STORE_SHORT_D16_HI_BOTHEN_vi