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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc16623 { 561, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #561 = BUFFER_LOAD_DWORDX4_OFFSET
16624 { 562, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #562 = BUFFER_LOAD_DWORDX4_OFFSET_exact
16668 { 606, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4080300010000ULL, ImplicitList2, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #606 = BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFSET
16669 { 607, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4081300010000ULL, ImplicitList2, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #607 = BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFSET_exact
16731 { 669, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #669 = BUFFER_LOAD_FORMAT_XYZW_OFFSET
16732 { 670, 9, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #670 = BUFFER_LOAD_FORMAT_XYZW_OFFSET_exact
16938 { 876, 9, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #876 = BUFFER_STORE_DWORDX4_OFFSET
16939 { 877, 9, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #877 = BUFFER_STORE_DWORDX4_OFFSET_exact
16974 { 912, 9, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4080300010000ULL, ImplicitList2, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #912 = BUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFSET
16975 { 913, 9, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4081300010000ULL, ImplicitList2, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #913 = BUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFSET_exact
17037 { 975, 9, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80300010000ULL, ImplicitList2, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #975 = BUFFER_STORE_FORMAT_XYZW_OFFSET
17038 { 976, 9, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #976 = BUFFER_STORE_FORMAT_XYZW_OFFSET_exact
21028 { 4966, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #4966 = BUFFER_LOAD_DWORDX4_OFFSET_gfx10
21029 { 4967, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #4967 = BUFFER_LOAD_DWORDX4_OFFSET_gfx6_gfx7
21030 { 4968, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #4968 = BUFFER_LOAD_DWORDX4_OFFSET_vi
21072 { 5010, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080300010000ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #5010 = BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFSET_gfx80
21119 { 5057, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #5057 = BUFFER_LOAD_FORMAT_XYZW_OFFSET_gfx10
21120 { 5058, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #5058 = BUFFER_LOAD_FORMAT_XYZW_OFFSET_gfx6_gfx7
21121 { 5059, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #5059 = BUFFER_LOAD_FORMAT_XYZW_OFFSET_vi
21383 { 5321, 9, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #5321 = BUFFER_STORE_DWORDX4_OFFSET_gfx10
21384 { 5322, 9, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #5322 = BUFFER_STORE_DWORDX4_OFFSET_gfx6_gfx7
21385 { 5323, 9, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #5323 = BUFFER_STORE_DWORDX4_OFFSET_vi
21414 { 5352, 9, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080300010000ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #5352 = BUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFSET_gfx80
21461 { 5399, 9, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #5399 = BUFFER_STORE_FORMAT_XYZW_OFFSET_gfx10
21462 { 5400, 9, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #5400 = BUFFER_STORE_FORMAT_XYZW_OFFSET_gfx6_gfx7
21463 { 5401, 9, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80300010000ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #5401 = BUFFER_STORE_FORMAT_XYZW_OFFSET_vi