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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc16299 { 237, 7, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #237 = BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_RTN
16301 { 239, 7, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #239 = BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_RTN
16339 { 277, 7, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #277 = BUFFER_ATOMIC_FCMPSWAP_X2_IDXEN_RTN
16341 { 279, 7, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #279 = BUFFER_ATOMIC_FCMPSWAP_X2_OFFEN_RTN
20328 { 4266, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4266 = BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_RTN_gfx10
20329 { 4267, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4267 = BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_RTN_gfx6_gfx7
20330 { 4268, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4268 = BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_RTN_vi
20334 { 4272, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4272 = BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_RTN_gfx10
20335 { 4273, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4273 = BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_RTN_gfx6_gfx7
20336 { 4274, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4274 = BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_RTN_vi
20422 { 4360, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4360 = BUFFER_ATOMIC_FCMPSWAP_X2_IDXEN_RTN_gfx10
20423 { 4361, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4361 = BUFFER_ATOMIC_FCMPSWAP_X2_IDXEN_RTN_gfx6_gfx7
20426 { 4364, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4364 = BUFFER_ATOMIC_FCMPSWAP_X2_OFFEN_RTN_gfx10
20427 { 4365, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4365 = BUFFER_ATOMIC_FCMPSWAP_X2_OFFEN_RTN_gfx6_gfx7