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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc16263 { 201, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #201 = BUFFER_ATOMIC_ADD_X2_OFFSET_RTN
16283 { 221, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #221 = BUFFER_ATOMIC_AND_X2_OFFSET_RTN
16293 { 231, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #231 = BUFFER_ATOMIC_CMPSWAP_OFFSET_RTN
16323 { 261, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #261 = BUFFER_ATOMIC_DEC_X2_OFFSET_RTN
16333 { 271, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #271 = BUFFER_ATOMIC_FCMPSWAP_OFFSET_RTN
16363 { 301, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #301 = BUFFER_ATOMIC_FMAX_X2_OFFSET_RTN
16383 { 321, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #321 = BUFFER_ATOMIC_FMIN_X2_OFFSET_RTN
16403 { 341, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #341 = BUFFER_ATOMIC_INC_X2_OFFSET_RTN
16423 { 361, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #361 = BUFFER_ATOMIC_OR_X2_OFFSET_RTN
16448 { 386, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #386 = BUFFER_ATOMIC_SMAX_X2_OFFSET_RTN
16468 { 406, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #406 = BUFFER_ATOMIC_SMIN_X2_OFFSET_RTN
16488 { 426, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #426 = BUFFER_ATOMIC_SUB_X2_OFFSET_RTN
16508 { 446, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #446 = BUFFER_ATOMIC_SWAP_X2_OFFSET_RTN
16528 { 466, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #466 = BUFFER_ATOMIC_UMAX_X2_OFFSET_RTN
16548 { 486, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #486 = BUFFER_ATOMIC_UMIN_X2_OFFSET_RTN
16568 { 506, 6, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #506 = BUFFER_ATOMIC_XOR_X2_OFFSET_RTN
20236 { 4174, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4174 = BUFFER_ATOMIC_ADD_X2_OFFSET_RTN_gfx10
20237 { 4175, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4175 = BUFFER_ATOMIC_ADD_X2_OFFSET_RTN_gfx6_gfx7
20238 { 4176, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4176 = BUFFER_ATOMIC_ADD_X2_OFFSET_RTN_vi
20288 { 4226, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4226 = BUFFER_ATOMIC_AND_X2_OFFSET_RTN_gfx10
20289 { 4227, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4227 = BUFFER_ATOMIC_AND_X2_OFFSET_RTN_gfx6_gfx7
20290 { 4228, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4228 = BUFFER_ATOMIC_AND_X2_OFFSET_RTN_vi
20314 { 4252, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4252 = BUFFER_ATOMIC_CMPSWAP_OFFSET_RTN_gfx10
20315 { 4253, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4253 = BUFFER_ATOMIC_CMPSWAP_OFFSET_RTN_gfx6_gfx7
20316 { 4254, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4254 = BUFFER_ATOMIC_CMPSWAP_OFFSET_RTN_vi
20392 { 4330, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4330 = BUFFER_ATOMIC_DEC_X2_OFFSET_RTN_gfx10
20393 { 4331, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4331 = BUFFER_ATOMIC_DEC_X2_OFFSET_RTN_gfx6_gfx7
20394 { 4332, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4332 = BUFFER_ATOMIC_DEC_X2_OFFSET_RTN_vi
20412 { 4350, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4350 = BUFFER_ATOMIC_FCMPSWAP_OFFSET_RTN_gfx10
20413 { 4351, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4351 = BUFFER_ATOMIC_FCMPSWAP_OFFSET_RTN_gfx6_gfx7
20466 { 4404, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4404 = BUFFER_ATOMIC_FMAX_X2_OFFSET_RTN_gfx10
20467 { 4405, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4405 = BUFFER_ATOMIC_FMAX_X2_OFFSET_RTN_gfx6_gfx7
20502 { 4440, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4440 = BUFFER_ATOMIC_FMIN_X2_OFFSET_RTN_gfx10
20503 { 4441, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4441 = BUFFER_ATOMIC_FMIN_X2_OFFSET_RTN_gfx6_gfx7
20552 { 4490, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4490 = BUFFER_ATOMIC_INC_X2_OFFSET_RTN_gfx10
20553 { 4491, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4491 = BUFFER_ATOMIC_INC_X2_OFFSET_RTN_gfx6_gfx7
20554 { 4492, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4492 = BUFFER_ATOMIC_INC_X2_OFFSET_RTN_vi
20604 { 4542, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4542 = BUFFER_ATOMIC_OR_X2_OFFSET_RTN_gfx10
20605 { 4543, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4543 = BUFFER_ATOMIC_OR_X2_OFFSET_RTN_gfx6_gfx7
20606 { 4544, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4544 = BUFFER_ATOMIC_OR_X2_OFFSET_RTN_vi
20660 { 4598, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4598 = BUFFER_ATOMIC_SMAX_X2_OFFSET_RTN_gfx10
20661 { 4599, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4599 = BUFFER_ATOMIC_SMAX_X2_OFFSET_RTN_gfx6_gfx7
20662 { 4600, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4600 = BUFFER_ATOMIC_SMAX_X2_OFFSET_RTN_vi
20712 { 4650, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4650 = BUFFER_ATOMIC_SMIN_X2_OFFSET_RTN_gfx10
20713 { 4651, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4651 = BUFFER_ATOMIC_SMIN_X2_OFFSET_RTN_gfx6_gfx7
20714 { 4652, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4652 = BUFFER_ATOMIC_SMIN_X2_OFFSET_RTN_vi
20764 { 4702, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4702 = BUFFER_ATOMIC_SUB_X2_OFFSET_RTN_gfx10
20765 { 4703, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4703 = BUFFER_ATOMIC_SUB_X2_OFFSET_RTN_gfx6_gfx7
20766 { 4704, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4704 = BUFFER_ATOMIC_SUB_X2_OFFSET_RTN_vi
20816 { 4754, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4754 = BUFFER_ATOMIC_SWAP_X2_OFFSET_RTN_gfx10
20817 { 4755, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4755 = BUFFER_ATOMIC_SWAP_X2_OFFSET_RTN_gfx6_gfx7
20818 { 4756, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4756 = BUFFER_ATOMIC_SWAP_X2_OFFSET_RTN_vi
20868 { 4806, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4806 = BUFFER_ATOMIC_UMAX_X2_OFFSET_RTN_gfx10
20869 { 4807, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4807 = BUFFER_ATOMIC_UMAX_X2_OFFSET_RTN_gfx6_gfx7
20870 { 4808, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4808 = BUFFER_ATOMIC_UMAX_X2_OFFSET_RTN_vi
20920 { 4858, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4858 = BUFFER_ATOMIC_UMIN_X2_OFFSET_RTN_gfx10
20921 { 4859, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4859 = BUFFER_ATOMIC_UMIN_X2_OFFSET_RTN_gfx6_gfx7
20922 { 4860, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4860 = BUFFER_ATOMIC_UMIN_X2_OFFSET_RTN_vi
20972 { 4910, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4910 = BUFFER_ATOMIC_XOR_X2_OFFSET_RTN_gfx10
20973 { 4911, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4911 = BUFFER_ATOMIC_XOR_X2_OFFSET_RTN_gfx6_gfx7
20974 { 4912, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, // Inst #4912 = BUFFER_ATOMIC_XOR_X2_OFFSET_RTN_vi