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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc16262 { 200, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #200 = BUFFER_ATOMIC_ADD_X2_OFFSET
16282 { 220, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #220 = BUFFER_ATOMIC_AND_X2_OFFSET
16292 { 230, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #230 = BUFFER_ATOMIC_CMPSWAP_OFFSET
16322 { 260, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #260 = BUFFER_ATOMIC_DEC_X2_OFFSET
16332 { 270, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #270 = BUFFER_ATOMIC_FCMPSWAP_OFFSET
16362 { 300, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #300 = BUFFER_ATOMIC_FMAX_X2_OFFSET
16382 { 320, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #320 = BUFFER_ATOMIC_FMIN_X2_OFFSET
16402 { 340, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #340 = BUFFER_ATOMIC_INC_X2_OFFSET
16422 { 360, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #360 = BUFFER_ATOMIC_OR_X2_OFFSET
16447 { 385, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #385 = BUFFER_ATOMIC_SMAX_X2_OFFSET
16467 { 405, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #405 = BUFFER_ATOMIC_SMIN_X2_OFFSET
16487 { 425, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #425 = BUFFER_ATOMIC_SUB_X2_OFFSET
16507 { 445, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #445 = BUFFER_ATOMIC_SWAP_X2_OFFSET
16527 { 465, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #465 = BUFFER_ATOMIC_UMAX_X2_OFFSET
16547 { 485, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #485 = BUFFER_ATOMIC_UMIN_X2_OFFSET
16567 { 505, 5, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #505 = BUFFER_ATOMIC_XOR_X2_OFFSET
20239 { 4177, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4177 = BUFFER_ATOMIC_ADD_X2_OFFSET_gfx10
20240 { 4178, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4178 = BUFFER_ATOMIC_ADD_X2_OFFSET_gfx6_gfx7
20241 { 4179, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4179 = BUFFER_ATOMIC_ADD_X2_OFFSET_vi
20291 { 4229, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4229 = BUFFER_ATOMIC_AND_X2_OFFSET_gfx10
20292 { 4230, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4230 = BUFFER_ATOMIC_AND_X2_OFFSET_gfx6_gfx7
20293 { 4231, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4231 = BUFFER_ATOMIC_AND_X2_OFFSET_vi
20317 { 4255, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4255 = BUFFER_ATOMIC_CMPSWAP_OFFSET_gfx10
20318 { 4256, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4256 = BUFFER_ATOMIC_CMPSWAP_OFFSET_gfx6_gfx7
20319 { 4257, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4257 = BUFFER_ATOMIC_CMPSWAP_OFFSET_vi
20395 { 4333, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4333 = BUFFER_ATOMIC_DEC_X2_OFFSET_gfx10
20396 { 4334, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4334 = BUFFER_ATOMIC_DEC_X2_OFFSET_gfx6_gfx7
20397 { 4335, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4335 = BUFFER_ATOMIC_DEC_X2_OFFSET_vi
20414 { 4352, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4352 = BUFFER_ATOMIC_FCMPSWAP_OFFSET_gfx10
20415 { 4353, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4353 = BUFFER_ATOMIC_FCMPSWAP_OFFSET_gfx6_gfx7
20468 { 4406, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4406 = BUFFER_ATOMIC_FMAX_X2_OFFSET_gfx10
20469 { 4407, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4407 = BUFFER_ATOMIC_FMAX_X2_OFFSET_gfx6_gfx7
20504 { 4442, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4442 = BUFFER_ATOMIC_FMIN_X2_OFFSET_gfx10
20505 { 4443, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4443 = BUFFER_ATOMIC_FMIN_X2_OFFSET_gfx6_gfx7
20555 { 4493, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4493 = BUFFER_ATOMIC_INC_X2_OFFSET_gfx10
20556 { 4494, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4494 = BUFFER_ATOMIC_INC_X2_OFFSET_gfx6_gfx7
20557 { 4495, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4495 = BUFFER_ATOMIC_INC_X2_OFFSET_vi
20607 { 4545, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4545 = BUFFER_ATOMIC_OR_X2_OFFSET_gfx10
20608 { 4546, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4546 = BUFFER_ATOMIC_OR_X2_OFFSET_gfx6_gfx7
20609 { 4547, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4547 = BUFFER_ATOMIC_OR_X2_OFFSET_vi
20663 { 4601, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4601 = BUFFER_ATOMIC_SMAX_X2_OFFSET_gfx10
20664 { 4602, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4602 = BUFFER_ATOMIC_SMAX_X2_OFFSET_gfx6_gfx7
20665 { 4603, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4603 = BUFFER_ATOMIC_SMAX_X2_OFFSET_vi
20715 { 4653, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4653 = BUFFER_ATOMIC_SMIN_X2_OFFSET_gfx10
20716 { 4654, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4654 = BUFFER_ATOMIC_SMIN_X2_OFFSET_gfx6_gfx7
20717 { 4655, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4655 = BUFFER_ATOMIC_SMIN_X2_OFFSET_vi
20767 { 4705, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4705 = BUFFER_ATOMIC_SUB_X2_OFFSET_gfx10
20768 { 4706, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4706 = BUFFER_ATOMIC_SUB_X2_OFFSET_gfx6_gfx7
20769 { 4707, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4707 = BUFFER_ATOMIC_SUB_X2_OFFSET_vi
20819 { 4757, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4757 = BUFFER_ATOMIC_SWAP_X2_OFFSET_gfx10
20820 { 4758, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4758 = BUFFER_ATOMIC_SWAP_X2_OFFSET_gfx6_gfx7
20821 { 4759, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4759 = BUFFER_ATOMIC_SWAP_X2_OFFSET_vi
20871 { 4809, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4809 = BUFFER_ATOMIC_UMAX_X2_OFFSET_gfx10
20872 { 4810, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4810 = BUFFER_ATOMIC_UMAX_X2_OFFSET_gfx6_gfx7
20873 { 4811, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4811 = BUFFER_ATOMIC_UMAX_X2_OFFSET_vi
20923 { 4861, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4861 = BUFFER_ATOMIC_UMIN_X2_OFFSET_gfx10
20924 { 4862, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4862 = BUFFER_ATOMIC_UMIN_X2_OFFSET_gfx6_gfx7
20925 { 4863, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4863 = BUFFER_ATOMIC_UMIN_X2_OFFSET_vi
20975 { 4913, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4913 = BUFFER_ATOMIC_XOR_X2_OFFSET_gfx10
20976 { 4914, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4914 = BUFFER_ATOMIC_XOR_X2_OFFSET_gfx6_gfx7
20977 { 4915, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #4915 = BUFFER_ATOMIC_XOR_X2_OFFSET_vi