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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc19801 { 3739, 9, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #3739 = V_MAD_I16_gfx9
19810 { 3748, 9, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #3748 = V_MAD_U16_gfx9
19816 { 3754, 9, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #3754 = V_MAX3_I16
19818 { 3756, 9, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #3756 = V_MAX3_U16
19855 { 3793, 9, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #3793 = V_MED3_I16
19857 { 3795, 9, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #3795 = V_MED3_U16
19881 { 3819, 9, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #3819 = V_MIN3_I16
19883 { 3821, 9, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #3821 = V_MIN3_U16
30459 { 14397, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14397 = V_MAD_I16_gfx10
30460 { 14398, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14398 = V_MAD_I16_gfx9_gfx9
30479 { 14417, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14417 = V_MAD_U16_gfx10
30480 { 14418, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14418 = V_MAD_U16_gfx9_gfx9
30495 { 14433, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14433 = V_MAX3_I16_gfx10
30496 { 14434, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14434 = V_MAX3_I16_vi
30500 { 14438, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14438 = V_MAX3_U16_gfx10
30501 { 14439, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14439 = V_MAX3_U16_vi
30581 { 14519, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14519 = V_MED3_I16_gfx10
30582 { 14520, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14520 = V_MED3_I16_vi
30586 { 14524, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14524 = V_MED3_U16_gfx10
30587 { 14525, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14525 = V_MED3_U16_vi
30616 { 14554, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14554 = V_MIN3_I16_gfx10
30617 { 14555, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14555 = V_MIN3_I16_vi
30621 { 14559, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14559 = V_MIN3_U16_gfx10
30622 { 14560, 9, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc40000000402ULL, ImplicitList2, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #14560 = V_MIN3_U16_vi