|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc16239 { 177, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #177 = BUFFER_ATOMIC_ADD_ADDR64
16241 { 179, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #179 = BUFFER_ATOMIC_ADD_BOTHEN
16243 { 181, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #181 = BUFFER_ATOMIC_ADD_F32_ADDR64
16244 { 182, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #182 = BUFFER_ATOMIC_ADD_F32_BOTHEN
16264 { 202, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #202 = BUFFER_ATOMIC_AND_ADDR64
16266 { 204, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #204 = BUFFER_ATOMIC_AND_BOTHEN
16304 { 242, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #242 = BUFFER_ATOMIC_DEC_ADDR64
16306 { 244, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #244 = BUFFER_ATOMIC_DEC_BOTHEN
16344 { 282, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #282 = BUFFER_ATOMIC_FMAX_ADDR64
16346 { 284, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #284 = BUFFER_ATOMIC_FMAX_BOTHEN
16364 { 302, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #302 = BUFFER_ATOMIC_FMIN_ADDR64
16366 { 304, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #304 = BUFFER_ATOMIC_FMIN_BOTHEN
16384 { 322, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #322 = BUFFER_ATOMIC_INC_ADDR64
16386 { 324, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #324 = BUFFER_ATOMIC_INC_BOTHEN
16404 { 342, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #342 = BUFFER_ATOMIC_OR_ADDR64
16406 { 344, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #344 = BUFFER_ATOMIC_OR_BOTHEN
16424 { 362, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #362 = BUFFER_ATOMIC_PK_ADD_F16_ADDR64
16425 { 363, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #363 = BUFFER_ATOMIC_PK_ADD_F16_BOTHEN
16429 { 367, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #367 = BUFFER_ATOMIC_SMAX_ADDR64
16431 { 369, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #369 = BUFFER_ATOMIC_SMAX_BOTHEN
16449 { 387, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #387 = BUFFER_ATOMIC_SMIN_ADDR64
16451 { 389, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #389 = BUFFER_ATOMIC_SMIN_BOTHEN
16469 { 407, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #407 = BUFFER_ATOMIC_SUB_ADDR64
16471 { 409, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #409 = BUFFER_ATOMIC_SUB_BOTHEN
16489 { 427, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #427 = BUFFER_ATOMIC_SWAP_ADDR64
16491 { 429, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #429 = BUFFER_ATOMIC_SWAP_BOTHEN
16509 { 447, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #447 = BUFFER_ATOMIC_UMAX_ADDR64
16511 { 449, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #449 = BUFFER_ATOMIC_UMAX_BOTHEN
16529 { 467, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #467 = BUFFER_ATOMIC_UMIN_ADDR64
16531 { 469, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #469 = BUFFER_ATOMIC_UMIN_BOTHEN
16549 { 487, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #487 = BUFFER_ATOMIC_XOR_ADDR64
16551 { 489, 6, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, ImplicitList2, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #489 = BUFFER_ATOMIC_XOR_BOTHEN
20187 { 4125, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4125 = BUFFER_ATOMIC_ADD_ADDR64_gfx6_gfx7
20191 { 4129, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4129 = BUFFER_ATOMIC_ADD_BOTHEN_gfx10
20192 { 4130, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4130 = BUFFER_ATOMIC_ADD_BOTHEN_gfx6_gfx7
20193 { 4131, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4131 = BUFFER_ATOMIC_ADD_BOTHEN_vi
20194 { 4132, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4132 = BUFFER_ATOMIC_ADD_F32_BOTHEN_vi
20243 { 4181, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4181 = BUFFER_ATOMIC_AND_ADDR64_gfx6_gfx7
20247 { 4185, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4185 = BUFFER_ATOMIC_AND_BOTHEN_gfx10
20248 { 4186, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4186 = BUFFER_ATOMIC_AND_BOTHEN_gfx6_gfx7
20249 { 4187, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4187 = BUFFER_ATOMIC_AND_BOTHEN_vi
20347 { 4285, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4285 = BUFFER_ATOMIC_DEC_ADDR64_gfx6_gfx7
20351 { 4289, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4289 = BUFFER_ATOMIC_DEC_BOTHEN_gfx10
20352 { 4290, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4290 = BUFFER_ATOMIC_DEC_BOTHEN_gfx6_gfx7
20353 { 4291, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4291 = BUFFER_ATOMIC_DEC_BOTHEN_vi
20435 { 4373, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4373 = BUFFER_ATOMIC_FMAX_ADDR64_gfx6_gfx7
20438 { 4376, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4376 = BUFFER_ATOMIC_FMAX_BOTHEN_gfx10
20439 { 4377, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4377 = BUFFER_ATOMIC_FMAX_BOTHEN_gfx6_gfx7
20471 { 4409, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4409 = BUFFER_ATOMIC_FMIN_ADDR64_gfx6_gfx7
20474 { 4412, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4412 = BUFFER_ATOMIC_FMIN_BOTHEN_gfx10
20475 { 4413, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4413 = BUFFER_ATOMIC_FMIN_BOTHEN_gfx6_gfx7
20507 { 4445, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4445 = BUFFER_ATOMIC_INC_ADDR64_gfx6_gfx7
20511 { 4449, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4449 = BUFFER_ATOMIC_INC_BOTHEN_gfx10
20512 { 4450, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4450 = BUFFER_ATOMIC_INC_BOTHEN_gfx6_gfx7
20513 { 4451, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4451 = BUFFER_ATOMIC_INC_BOTHEN_vi
20559 { 4497, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4497 = BUFFER_ATOMIC_OR_ADDR64_gfx6_gfx7
20563 { 4501, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4501 = BUFFER_ATOMIC_OR_BOTHEN_gfx10
20564 { 4502, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4502 = BUFFER_ATOMIC_OR_BOTHEN_gfx6_gfx7
20565 { 4503, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4503 = BUFFER_ATOMIC_OR_BOTHEN_vi
20610 { 4548, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20081300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4548 = BUFFER_ATOMIC_PK_ADD_F16_BOTHEN_vi
20615 { 4553, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4553 = BUFFER_ATOMIC_SMAX_ADDR64_gfx6_gfx7
20619 { 4557, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4557 = BUFFER_ATOMIC_SMAX_BOTHEN_gfx10
20620 { 4558, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4558 = BUFFER_ATOMIC_SMAX_BOTHEN_gfx6_gfx7
20621 { 4559, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4559 = BUFFER_ATOMIC_SMAX_BOTHEN_vi
20667 { 4605, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4605 = BUFFER_ATOMIC_SMIN_ADDR64_gfx6_gfx7
20671 { 4609, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4609 = BUFFER_ATOMIC_SMIN_BOTHEN_gfx10
20672 { 4610, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4610 = BUFFER_ATOMIC_SMIN_BOTHEN_gfx6_gfx7
20673 { 4611, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4611 = BUFFER_ATOMIC_SMIN_BOTHEN_vi
20719 { 4657, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4657 = BUFFER_ATOMIC_SUB_ADDR64_gfx6_gfx7
20723 { 4661, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4661 = BUFFER_ATOMIC_SUB_BOTHEN_gfx10
20724 { 4662, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4662 = BUFFER_ATOMIC_SUB_BOTHEN_gfx6_gfx7
20725 { 4663, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4663 = BUFFER_ATOMIC_SUB_BOTHEN_vi
20771 { 4709, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4709 = BUFFER_ATOMIC_SWAP_ADDR64_gfx6_gfx7
20775 { 4713, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4713 = BUFFER_ATOMIC_SWAP_BOTHEN_gfx10
20776 { 4714, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4714 = BUFFER_ATOMIC_SWAP_BOTHEN_gfx6_gfx7
20777 { 4715, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4715 = BUFFER_ATOMIC_SWAP_BOTHEN_vi
20823 { 4761, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4761 = BUFFER_ATOMIC_UMAX_ADDR64_gfx6_gfx7
20827 { 4765, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4765 = BUFFER_ATOMIC_UMAX_BOTHEN_gfx10
20828 { 4766, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4766 = BUFFER_ATOMIC_UMAX_BOTHEN_gfx6_gfx7
20829 { 4767, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4767 = BUFFER_ATOMIC_UMAX_BOTHEN_vi
20875 { 4813, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4813 = BUFFER_ATOMIC_UMIN_ADDR64_gfx6_gfx7
20879 { 4817, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4817 = BUFFER_ATOMIC_UMIN_BOTHEN_gfx10
20880 { 4818, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4818 = BUFFER_ATOMIC_UMIN_BOTHEN_gfx6_gfx7
20881 { 4819, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4819 = BUFFER_ATOMIC_UMIN_BOTHEN_vi
20927 { 4865, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4865 = BUFFER_ATOMIC_XOR_ADDR64_gfx6_gfx7
20931 { 4869, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4869 = BUFFER_ATOMIC_XOR_BOTHEN_gfx10
20932 { 4870, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4870 = BUFFER_ATOMIC_XOR_BOTHEN_gfx6_gfx7
20933 { 4871, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81300010000ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #4871 = BUFFER_ATOMIC_XOR_BOTHEN_vi