|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc19523 { 3461, 4, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3461 = V_CVT_F32_I32_e64
19527 { 3465, 4, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3465 = V_CVT_F32_U32_e64
19531 { 3469, 4, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3469 = V_CVT_F32_UBYTE0_e64
19535 { 3473, 4, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3473 = V_CVT_F32_UBYTE1_e64
19539 { 3477, 4, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3477 = V_CVT_F32_UBYTE2_e64
19543 { 3481, 4, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3481 = V_CVT_F32_UBYTE3_e64
19575 { 3513, 4, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3513 = V_CVT_OFF_F32_I4_e64
29812 { 13750, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13750 = V_CVT_F32_I32_e64_gfx10
29813 { 13751, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13751 = V_CVT_F32_I32_e64_gfx6_gfx7
29814 { 13752, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13752 = V_CVT_F32_I32_e64_vi
29824 { 13762, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13762 = V_CVT_F32_U32_e64_gfx10
29825 { 13763, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13763 = V_CVT_F32_U32_e64_gfx6_gfx7
29826 { 13764, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13764 = V_CVT_F32_U32_e64_vi
29836 { 13774, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13774 = V_CVT_F32_UBYTE0_e64_gfx10
29837 { 13775, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13775 = V_CVT_F32_UBYTE0_e64_gfx6_gfx7
29838 { 13776, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13776 = V_CVT_F32_UBYTE0_e64_vi
29848 { 13786, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13786 = V_CVT_F32_UBYTE1_e64_gfx10
29849 { 13787, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13787 = V_CVT_F32_UBYTE1_e64_gfx6_gfx7
29850 { 13788, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13788 = V_CVT_F32_UBYTE1_e64_vi
29860 { 13798, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13798 = V_CVT_F32_UBYTE2_e64_gfx10
29861 { 13799, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13799 = V_CVT_F32_UBYTE2_e64_gfx6_gfx7
29862 { 13800, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13800 = V_CVT_F32_UBYTE2_e64_vi
29872 { 13810, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13810 = V_CVT_F32_UBYTE3_e64_gfx10
29873 { 13811, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13811 = V_CVT_F32_UBYTE3_e64_gfx6_gfx7
29874 { 13812, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13812 = V_CVT_F32_UBYTE3_e64_vi
29962 { 13900, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13900 = V_CVT_OFF_F32_I4_e64_gfx10
29963 { 13901, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13901 = V_CVT_OFF_F32_I4_e64_gfx6_gfx7
29964 { 13902, 4, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13902 = V_CVT_OFF_F32_I4_e64_vi