reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc
19520   { 3458,	5,	1,	8,	13,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #3458 = V_CVT_F32_F64_e64
19564   { 3502,	5,	1,	8,	13,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #3502 = V_CVT_I32_F64_e64
19605   { 3543,	5,	1,	8,	13,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #3543 = V_CVT_U32_F64_e64
19705   { 3643,	5,	1,	8,	10,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #3643 = V_FREXP_EXP_I32_F64_e64
29803   { 13741,	5,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #13741 = V_CVT_F32_F64_e64_gfx10
29804   { 13742,	5,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #13742 = V_CVT_F32_F64_e64_gfx6_gfx7
29805   { 13743,	5,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #13743 = V_CVT_F32_F64_e64_vi
29933   { 13871,	5,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #13871 = V_CVT_I32_F64_e64_gfx10
29934   { 13872,	5,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #13872 = V_CVT_I32_F64_e64_gfx6_gfx7
29935   { 13873,	5,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #13873 = V_CVT_I32_F64_e64_vi
30036   { 13974,	5,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #13974 = V_CVT_U32_F64_e64_gfx10
30037   { 13975,	5,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #13975 = V_CVT_U32_F64_e64_gfx6_gfx7
30038   { 13976,	5,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #13976 = V_CVT_U32_F64_e64_vi
30267   { 14205,	5,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #14205 = V_FREXP_EXP_I32_F64_e64_gfx10
30268   { 14206,	5,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #14206 = V_FREXP_EXP_I32_F64_e64_gfx6_gfx7
30269   { 14207,	5,	1,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo350, -1 ,nullptr },  // Inst #14207 = V_FREXP_EXP_I32_F64_e64_vi