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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18736 { 2674, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #2674 = V_CMPX_EQ_I32_nosdst_sdwa
18752 { 2690, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #2690 = V_CMPX_EQ_U32_nosdst_sdwa
18784 { 2722, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #2722 = V_CMPX_F_I32_nosdst_sdwa
18800 { 2738, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #2738 = V_CMPX_F_U32_nosdst_sdwa
18832 { 2770, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #2770 = V_CMPX_GE_I32_nosdst_sdwa
18848 { 2786, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #2786 = V_CMPX_GE_U32_nosdst_sdwa
18880 { 2818, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #2818 = V_CMPX_GT_I32_nosdst_sdwa
18896 { 2834, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #2834 = V_CMPX_GT_U32_nosdst_sdwa
18928 { 2866, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #2866 = V_CMPX_LE_I32_nosdst_sdwa
18944 { 2882, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #2882 = V_CMPX_LE_U32_nosdst_sdwa
18992 { 2930, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #2930 = V_CMPX_LT_I32_nosdst_sdwa
19008 { 2946, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #2946 = V_CMPX_LT_U32_nosdst_sdwa
19040 { 2978, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #2978 = V_CMPX_NE_I32_nosdst_sdwa
19056 { 2994, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #2994 = V_CMPX_NE_U32_nosdst_sdwa
19184 { 3122, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #3122 = V_CMPX_T_I32_nosdst_sdwa
19200 { 3138, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #3138 = V_CMPX_T_U32_nosdst_sdwa
28333 { 12271, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12271 = V_CMPX_EQ_I32_sdwa_gfx10
28355 { 12293, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12293 = V_CMPX_EQ_U32_sdwa_gfx10
28396 { 12334, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12334 = V_CMPX_F_I32_sdwa_gfx10
28415 { 12353, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12353 = V_CMPX_F_U32_sdwa_gfx10
28459 { 12397, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12397 = V_CMPX_GE_I32_sdwa_gfx10
28481 { 12419, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12419 = V_CMPX_GE_U32_sdwa_gfx10
28525 { 12463, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12463 = V_CMPX_GT_I32_sdwa_gfx10
28547 { 12485, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12485 = V_CMPX_GT_U32_sdwa_gfx10
28591 { 12529, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12529 = V_CMPX_LE_I32_sdwa_gfx10
28613 { 12551, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12551 = V_CMPX_LE_U32_sdwa_gfx10
28679 { 12617, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12617 = V_CMPX_LT_I32_sdwa_gfx10
28701 { 12639, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12639 = V_CMPX_LT_U32_sdwa_gfx10
28745 { 12683, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12683 = V_CMPX_NE_I32_sdwa_gfx10
28767 { 12705, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12705 = V_CMPX_NE_U32_sdwa_gfx10
28940 { 12878, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12878 = V_CMPX_T_I32_sdwa_gfx10
28959 { 12897, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo338, -1 ,nullptr }, // Inst #12897 = V_CMPX_T_U32_sdwa_gfx10