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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18735 { 2673, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #2673 = V_CMPX_EQ_I32_nosdst_e64
18751 { 2689, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #2689 = V_CMPX_EQ_U32_nosdst_e64
18783 { 2721, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #2721 = V_CMPX_F_I32_nosdst_e64
18799 { 2737, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #2737 = V_CMPX_F_U32_nosdst_e64
18831 { 2769, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #2769 = V_CMPX_GE_I32_nosdst_e64
18847 { 2785, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #2785 = V_CMPX_GE_U32_nosdst_e64
18879 { 2817, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #2817 = V_CMPX_GT_I32_nosdst_e64
18895 { 2833, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #2833 = V_CMPX_GT_U32_nosdst_e64
18927 { 2865, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #2865 = V_CMPX_LE_I32_nosdst_e64
18943 { 2881, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #2881 = V_CMPX_LE_U32_nosdst_e64
18991 { 2929, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #2929 = V_CMPX_LT_I32_nosdst_e64
19007 { 2945, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #2945 = V_CMPX_LT_U32_nosdst_e64
19039 { 2977, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #2977 = V_CMPX_NE_I32_nosdst_e64
19055 { 2993, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #2993 = V_CMPX_NE_U32_nosdst_e64
19183 { 3121, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #3121 = V_CMPX_T_I32_nosdst_e64
19199 { 3137, 2, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #3137 = V_CMPX_T_U32_nosdst_e64
28330 { 12268, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12268 = V_CMPX_EQ_I32_e64_gfx10
28352 { 12290, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12290 = V_CMPX_EQ_U32_e64_gfx10
28393 { 12331, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12331 = V_CMPX_F_I32_e64_gfx10
28412 { 12350, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12350 = V_CMPX_F_U32_e64_gfx10
28456 { 12394, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12394 = V_CMPX_GE_I32_e64_gfx10
28478 { 12416, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12416 = V_CMPX_GE_U32_e64_gfx10
28522 { 12460, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12460 = V_CMPX_GT_I32_e64_gfx10
28544 { 12482, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12482 = V_CMPX_GT_U32_e64_gfx10
28588 { 12526, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12526 = V_CMPX_LE_I32_e64_gfx10
28610 { 12548, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12548 = V_CMPX_LE_U32_e64_gfx10
28676 { 12614, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12614 = V_CMPX_LT_I32_e64_gfx10
28698 { 12636, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12636 = V_CMPX_LT_U32_e64_gfx10
28742 { 12680, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12680 = V_CMPX_NE_I32_e64_gfx10
28764 { 12702, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12702 = V_CMPX_NE_U32_e64_gfx10
28937 { 12875, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12875 = V_CMPX_T_I32_e64_gfx10
28956 { 12894, 2, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo337, -1 ,nullptr }, // Inst #12894 = V_CMPX_T_U32_e64_gfx10