reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc
18729   { 2667,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #2667 = V_CMPX_EQ_I16_nosdst_e64
18745   { 2683,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #2683 = V_CMPX_EQ_U16_nosdst_e64
18777   { 2715,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #2715 = V_CMPX_F_I16_nosdst_e64
18793   { 2731,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #2731 = V_CMPX_F_U16_nosdst_e64
18825   { 2763,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #2763 = V_CMPX_GE_I16_nosdst_e64
18841   { 2779,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #2779 = V_CMPX_GE_U16_nosdst_e64
18873   { 2811,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #2811 = V_CMPX_GT_I16_nosdst_e64
18889   { 2827,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #2827 = V_CMPX_GT_U16_nosdst_e64
18921   { 2859,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #2859 = V_CMPX_LE_I16_nosdst_e64
18937   { 2875,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #2875 = V_CMPX_LE_U16_nosdst_e64
18985   { 2923,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #2923 = V_CMPX_LT_I16_nosdst_e64
19001   { 2939,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #2939 = V_CMPX_LT_U16_nosdst_e64
19033   { 2971,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #2971 = V_CMPX_NE_I16_nosdst_e64
19049   { 2987,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #2987 = V_CMPX_NE_U16_nosdst_e64
19177   { 3115,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #3115 = V_CMPX_T_I16_nosdst_e64
19193   { 3131,	2,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #3131 = V_CMPX_T_U16_nosdst_e64
28322   { 12260,	2,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #12260 = V_CMPX_EQ_I16_e64_gfx10
28344   { 12282,	2,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #12282 = V_CMPX_EQ_U16_e64_gfx10
28448   { 12386,	2,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #12386 = V_CMPX_GE_I16_e64_gfx10
28470   { 12408,	2,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #12408 = V_CMPX_GE_U16_e64_gfx10
28514   { 12452,	2,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #12452 = V_CMPX_GT_I16_e64_gfx10
28536   { 12474,	2,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #12474 = V_CMPX_GT_U16_e64_gfx10
28580   { 12518,	2,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #12518 = V_CMPX_LE_I16_e64_gfx10
28602   { 12540,	2,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #12540 = V_CMPX_LE_U16_e64_gfx10
28668   { 12606,	2,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #12606 = V_CMPX_LT_I16_e64_gfx10
28690   { 12628,	2,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #12628 = V_CMPX_LT_U16_e64_gfx10
28734   { 12672,	2,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #12672 = V_CMPX_NE_I16_e64_gfx10
28756   { 12694,	2,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo332, -1 ,nullptr },  // Inst #12694 = V_CMPX_NE_U16_e64_gfx10