|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18727 { 2665, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #2665 = V_CMPX_EQ_I16_e64
18743 { 2681, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #2681 = V_CMPX_EQ_U16_e64
18775 { 2713, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #2713 = V_CMPX_F_I16_e64
18791 { 2729, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #2729 = V_CMPX_F_U16_e64
18823 { 2761, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #2761 = V_CMPX_GE_I16_e64
18839 { 2777, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #2777 = V_CMPX_GE_U16_e64
18871 { 2809, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #2809 = V_CMPX_GT_I16_e64
18887 { 2825, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #2825 = V_CMPX_GT_U16_e64
18919 { 2857, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #2857 = V_CMPX_LE_I16_e64
18935 { 2873, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #2873 = V_CMPX_LE_U16_e64
18983 { 2921, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #2921 = V_CMPX_LT_I16_e64
18999 { 2937, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #2937 = V_CMPX_LT_U16_e64
19031 { 2969, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #2969 = V_CMPX_NE_I16_e64
19047 { 2985, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #2985 = V_CMPX_NE_U16_e64
19175 { 3113, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #3113 = V_CMPX_T_I16_e64
19191 { 3129, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #3129 = V_CMPX_T_U16_e64
19239 { 3177, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3177 = V_CMP_EQ_I16_e64
19247 { 3185, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3185 = V_CMP_EQ_U16_e64
19263 { 3201, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3201 = V_CMP_F_I16_e64
19271 { 3209, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3209 = V_CMP_F_U16_e64
19287 { 3225, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3225 = V_CMP_GE_I16_e64
19295 { 3233, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3233 = V_CMP_GE_U16_e64
19311 { 3249, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3249 = V_CMP_GT_I16_e64
19319 { 3257, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3257 = V_CMP_GT_U16_e64
19335 { 3273, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3273 = V_CMP_LE_I16_e64
19343 { 3281, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3281 = V_CMP_LE_U16_e64
19367 { 3305, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3305 = V_CMP_LT_I16_e64
19375 { 3313, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3313 = V_CMP_LT_U16_e64
19391 { 3329, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3329 = V_CMP_NE_I16_e64
19399 { 3337, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3337 = V_CMP_NE_U16_e64
19463 { 3401, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3401 = V_CMP_T_I16_e64
19471 { 3409, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3409 = V_CMP_T_U16_e64
28323 { 12261, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12261 = V_CMPX_EQ_I16_e64_vi
28345 { 12283, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12283 = V_CMPX_EQ_U16_e64_vi
28387 { 12325, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12325 = V_CMPX_F_I16_e64_vi
28406 { 12344, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12344 = V_CMPX_F_U16_e64_vi
28449 { 12387, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12387 = V_CMPX_GE_I16_e64_vi
28471 { 12409, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12409 = V_CMPX_GE_U16_e64_vi
28515 { 12453, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12453 = V_CMPX_GT_I16_e64_vi
28537 { 12475, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12475 = V_CMPX_GT_U16_e64_vi
28581 { 12519, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12519 = V_CMPX_LE_I16_e64_vi
28603 { 12541, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12541 = V_CMPX_LE_U16_e64_vi
28669 { 12607, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12607 = V_CMPX_LT_I16_e64_vi
28691 { 12629, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12629 = V_CMPX_LT_U16_e64_vi
28735 { 12673, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12673 = V_CMPX_NE_I16_e64_vi
28757 { 12695, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12695 = V_CMPX_NE_U16_e64_vi
28931 { 12869, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12869 = V_CMPX_T_I16_e64_vi
28950 { 12888, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, ImplicitList2, OperandInfo331, -1 ,nullptr }, // Inst #12888 = V_CMPX_T_U16_e64_vi
29036 { 12974, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #12974 = V_CMP_EQ_I16_e64_gfx10
29037 { 12975, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #12975 = V_CMP_EQ_I16_e64_vi
29058 { 12996, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #12996 = V_CMP_EQ_U16_e64_gfx10
29059 { 12997, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #12997 = V_CMP_EQ_U16_e64_vi
29101 { 13039, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13039 = V_CMP_F_I16_e64_vi
29120 { 13058, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13058 = V_CMP_F_U16_e64_vi
29162 { 13100, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13100 = V_CMP_GE_I16_e64_gfx10
29163 { 13101, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13101 = V_CMP_GE_I16_e64_vi
29184 { 13122, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13122 = V_CMP_GE_U16_e64_gfx10
29185 { 13123, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13123 = V_CMP_GE_U16_e64_vi
29228 { 13166, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13166 = V_CMP_GT_I16_e64_gfx10
29229 { 13167, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13167 = V_CMP_GT_I16_e64_vi
29250 { 13188, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13188 = V_CMP_GT_U16_e64_gfx10
29251 { 13189, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13189 = V_CMP_GT_U16_e64_vi
29294 { 13232, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13232 = V_CMP_LE_I16_e64_gfx10
29295 { 13233, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13233 = V_CMP_LE_I16_e64_vi
29316 { 13254, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13254 = V_CMP_LE_U16_e64_gfx10
29317 { 13255, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13255 = V_CMP_LE_U16_e64_vi
29382 { 13320, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13320 = V_CMP_LT_I16_e64_gfx10
29383 { 13321, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13321 = V_CMP_LT_I16_e64_vi
29404 { 13342, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13342 = V_CMP_LT_U16_e64_gfx10
29405 { 13343, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13343 = V_CMP_LT_U16_e64_vi
29448 { 13386, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13386 = V_CMP_NE_I16_e64_gfx10
29449 { 13387, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13387 = V_CMP_NE_I16_e64_vi
29470 { 13408, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13408 = V_CMP_NE_U16_e64_gfx10
29471 { 13409, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13409 = V_CMP_NE_U16_e64_vi
29645 { 13583, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13583 = V_CMP_T_I16_e64_vi
29664 { 13602, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13602 = V_CMP_T_U16_e64_vi