reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc
18713   { 2651,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #2651 = V_CMPX_EQ_F16_nosdst_e64
18761   { 2699,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #2699 = V_CMPX_F_F16_nosdst_e64
18809   { 2747,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #2747 = V_CMPX_GE_F16_nosdst_e64
18857   { 2795,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #2795 = V_CMPX_GT_F16_nosdst_e64
18905   { 2843,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #2843 = V_CMPX_LE_F16_nosdst_e64
18953   { 2891,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #2891 = V_CMPX_LG_F16_nosdst_e64
18969   { 2907,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #2907 = V_CMPX_LT_F16_nosdst_e64
19017   { 2955,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #2955 = V_CMPX_NEQ_F16_nosdst_e64
19065   { 3003,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #3003 = V_CMPX_NGE_F16_nosdst_e64
19081   { 3019,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #3019 = V_CMPX_NGT_F16_nosdst_e64
19097   { 3035,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #3035 = V_CMPX_NLE_F16_nosdst_e64
19113   { 3051,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #3051 = V_CMPX_NLG_F16_nosdst_e64
19129   { 3067,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #3067 = V_CMPX_NLT_F16_nosdst_e64
19145   { 3083,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #3083 = V_CMPX_O_F16_nosdst_e64
19161   { 3099,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #3099 = V_CMPX_TRU_F16_nosdst_e64
19209   { 3147,	5,	0,	8,	2,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #3147 = V_CMPX_U_F16_nosdst_e64
28300   { 12238,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12238 = V_CMPX_EQ_F16_e64_gfx10
28366   { 12304,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12304 = V_CMPX_F_F16_e64_gfx10
28426   { 12364,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12364 = V_CMPX_GE_F16_e64_gfx10
28492   { 12430,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12430 = V_CMPX_GT_F16_e64_gfx10
28558   { 12496,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12496 = V_CMPX_LE_F16_e64_gfx10
28624   { 12562,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12562 = V_CMPX_LG_F16_e64_gfx10
28646   { 12584,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12584 = V_CMPX_LT_F16_e64_gfx10
28712   { 12650,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12650 = V_CMPX_NEQ_F16_e64_gfx10
28778   { 12716,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12716 = V_CMPX_NGE_F16_e64_gfx10
28800   { 12738,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12738 = V_CMPX_NGT_F16_e64_gfx10
28822   { 12760,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12760 = V_CMPX_NLE_F16_e64_gfx10
28844   { 12782,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12782 = V_CMPX_NLG_F16_e64_gfx10
28866   { 12804,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12804 = V_CMPX_NLT_F16_e64_gfx10
28888   { 12826,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12826 = V_CMPX_O_F16_e64_gfx10
28910   { 12848,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12848 = V_CMPX_TRU_F16_e64_gfx10
28970   { 12908,	5,	0,	8,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo329, -1 ,nullptr },  // Inst #12908 = V_CMPX_U_F16_e64_gfx10