|
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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18711 { 2649, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #2649 = V_CMPX_EQ_F16_e64
18759 { 2697, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #2697 = V_CMPX_F_F16_e64
18807 { 2745, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #2745 = V_CMPX_GE_F16_e64
18855 { 2793, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #2793 = V_CMPX_GT_F16_e64
18903 { 2841, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #2841 = V_CMPX_LE_F16_e64
18951 { 2889, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #2889 = V_CMPX_LG_F16_e64
18967 { 2905, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #2905 = V_CMPX_LT_F16_e64
19015 { 2953, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #2953 = V_CMPX_NEQ_F16_e64
19063 { 3001, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #3001 = V_CMPX_NGE_F16_e64
19079 { 3017, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #3017 = V_CMPX_NGT_F16_e64
19095 { 3033, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #3033 = V_CMPX_NLE_F16_e64
19111 { 3049, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #3049 = V_CMPX_NLG_F16_e64
19127 { 3065, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #3065 = V_CMPX_NLT_F16_e64
19143 { 3081, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #3081 = V_CMPX_O_F16_e64
19159 { 3097, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #3097 = V_CMPX_TRU_F16_e64
19207 { 3145, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #3145 = V_CMPX_U_F16_e64
19231 { 3169, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3169 = V_CMP_EQ_F16_e64
19255 { 3193, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3193 = V_CMP_F_F16_e64
19279 { 3217, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3217 = V_CMP_GE_F16_e64
19303 { 3241, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3241 = V_CMP_GT_F16_e64
19327 { 3265, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3265 = V_CMP_LE_F16_e64
19351 { 3289, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3289 = V_CMP_LG_F16_e64
19359 { 3297, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3297 = V_CMP_LT_F16_e64
19383 { 3321, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3321 = V_CMP_NEQ_F16_e64
19407 { 3345, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3345 = V_CMP_NGE_F16_e64
19415 { 3353, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3353 = V_CMP_NGT_F16_e64
19423 { 3361, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3361 = V_CMP_NLE_F16_e64
19431 { 3369, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3369 = V_CMP_NLG_F16_e64
19439 { 3377, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3377 = V_CMP_NLT_F16_e64
19447 { 3385, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3385 = V_CMP_O_F16_e64
19455 { 3393, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3393 = V_CMP_TRU_F16_e64
19479 { 3417, 6, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3417 = V_CMP_U_F16_e64
28301 { 12239, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12239 = V_CMPX_EQ_F16_e64_vi
28367 { 12305, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12305 = V_CMPX_F_F16_e64_vi
28427 { 12365, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12365 = V_CMPX_GE_F16_e64_vi
28493 { 12431, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12431 = V_CMPX_GT_F16_e64_vi
28559 { 12497, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12497 = V_CMPX_LE_F16_e64_vi
28625 { 12563, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12563 = V_CMPX_LG_F16_e64_vi
28647 { 12585, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12585 = V_CMPX_LT_F16_e64_vi
28713 { 12651, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12651 = V_CMPX_NEQ_F16_e64_vi
28779 { 12717, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12717 = V_CMPX_NGE_F16_e64_vi
28801 { 12739, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12739 = V_CMPX_NGT_F16_e64_vi
28823 { 12761, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12761 = V_CMPX_NLE_F16_e64_vi
28845 { 12783, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12783 = V_CMPX_NLG_F16_e64_vi
28867 { 12805, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12805 = V_CMPX_NLT_F16_e64_vi
28889 { 12827, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12827 = V_CMPX_O_F16_e64_vi
28911 { 12849, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12849 = V_CMPX_TRU_F16_e64_vi
28971 { 12909, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo328, -1 ,nullptr }, // Inst #12909 = V_CMPX_U_F16_e64_vi
29014 { 12952, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #12952 = V_CMP_EQ_F16_e64_gfx10
29015 { 12953, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #12953 = V_CMP_EQ_F16_e64_vi
29080 { 13018, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13018 = V_CMP_F_F16_e64_gfx10
29081 { 13019, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13019 = V_CMP_F_F16_e64_vi
29140 { 13078, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13078 = V_CMP_GE_F16_e64_gfx10
29141 { 13079, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13079 = V_CMP_GE_F16_e64_vi
29206 { 13144, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13144 = V_CMP_GT_F16_e64_gfx10
29207 { 13145, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13145 = V_CMP_GT_F16_e64_vi
29272 { 13210, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13210 = V_CMP_LE_F16_e64_gfx10
29273 { 13211, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13211 = V_CMP_LE_F16_e64_vi
29338 { 13276, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13276 = V_CMP_LG_F16_e64_gfx10
29339 { 13277, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13277 = V_CMP_LG_F16_e64_vi
29360 { 13298, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13298 = V_CMP_LT_F16_e64_gfx10
29361 { 13299, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13299 = V_CMP_LT_F16_e64_vi
29426 { 13364, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13364 = V_CMP_NEQ_F16_e64_gfx10
29427 { 13365, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13365 = V_CMP_NEQ_F16_e64_vi
29492 { 13430, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13430 = V_CMP_NGE_F16_e64_gfx10
29493 { 13431, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13431 = V_CMP_NGE_F16_e64_vi
29514 { 13452, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13452 = V_CMP_NGT_F16_e64_gfx10
29515 { 13453, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13453 = V_CMP_NGT_F16_e64_vi
29536 { 13474, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13474 = V_CMP_NLE_F16_e64_gfx10
29537 { 13475, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13475 = V_CMP_NLE_F16_e64_vi
29558 { 13496, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13496 = V_CMP_NLG_F16_e64_gfx10
29559 { 13497, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13497 = V_CMP_NLG_F16_e64_vi
29580 { 13518, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13518 = V_CMP_NLT_F16_e64_gfx10
29581 { 13519, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13519 = V_CMP_NLT_F16_e64_vi
29602 { 13540, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13540 = V_CMP_O_F16_e64_gfx10
29603 { 13541, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13541 = V_CMP_O_F16_e64_vi
29624 { 13562, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13562 = V_CMP_TRU_F16_e64_gfx10
29625 { 13563, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13563 = V_CMP_TRU_F16_e64_vi
29684 { 13622, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13622 = V_CMP_U_F16_e64_gfx10
29685 { 13623, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13623 = V_CMP_U_F16_e64_vi