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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18698 { 2636, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #2636 = V_CMPX_CLASS_F16_nosdst_sdwa
18714 { 2652, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #2652 = V_CMPX_EQ_F16_nosdst_sdwa
18762 { 2700, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #2700 = V_CMPX_F_F16_nosdst_sdwa
18810 { 2748, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #2748 = V_CMPX_GE_F16_nosdst_sdwa
18858 { 2796, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #2796 = V_CMPX_GT_F16_nosdst_sdwa
18906 { 2844, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #2844 = V_CMPX_LE_F16_nosdst_sdwa
18954 { 2892, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #2892 = V_CMPX_LG_F16_nosdst_sdwa
18970 { 2908, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #2908 = V_CMPX_LT_F16_nosdst_sdwa
19018 { 2956, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #2956 = V_CMPX_NEQ_F16_nosdst_sdwa
19066 { 3004, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #3004 = V_CMPX_NGE_F16_nosdst_sdwa
19082 { 3020, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #3020 = V_CMPX_NGT_F16_nosdst_sdwa
19098 { 3036, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #3036 = V_CMPX_NLE_F16_nosdst_sdwa
19114 { 3052, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #3052 = V_CMPX_NLG_F16_nosdst_sdwa
19130 { 3068, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #3068 = V_CMPX_NLT_F16_nosdst_sdwa
19146 { 3084, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #3084 = V_CMPX_O_F16_nosdst_sdwa
19162 { 3100, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #3100 = V_CMPX_TRU_F16_nosdst_sdwa
19210 { 3148, 6, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::Convergent), 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #3148 = V_CMPX_U_F16_nosdst_sdwa
28280 { 12218, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12218 = V_CMPX_CLASS_F16_sdwa_gfx10
28302 { 12240, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12240 = V_CMPX_EQ_F16_sdwa_gfx10
28368 { 12306, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12306 = V_CMPX_F_F16_sdwa_gfx10
28428 { 12366, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12366 = V_CMPX_GE_F16_sdwa_gfx10
28494 { 12432, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12432 = V_CMPX_GT_F16_sdwa_gfx10
28560 { 12498, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12498 = V_CMPX_LE_F16_sdwa_gfx10
28626 { 12564, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12564 = V_CMPX_LG_F16_sdwa_gfx10
28648 { 12586, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12586 = V_CMPX_LT_F16_sdwa_gfx10
28714 { 12652, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12652 = V_CMPX_NEQ_F16_sdwa_gfx10
28780 { 12718, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12718 = V_CMPX_NGE_F16_sdwa_gfx10
28802 { 12740, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12740 = V_CMPX_NGT_F16_sdwa_gfx10
28824 { 12762, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12762 = V_CMPX_NLE_F16_sdwa_gfx10
28846 { 12784, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12784 = V_CMPX_NLG_F16_sdwa_gfx10
28868 { 12806, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12806 = V_CMPX_NLT_F16_sdwa_gfx10
28890 { 12828, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12828 = V_CMPX_O_F16_sdwa_gfx10
28912 { 12850, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12850 = V_CMPX_TRU_F16_sdwa_gfx10
28972 { 12910, 6, 0, 8, 2, 0, 0x4002ULL, ImplicitList2, ImplicitList2, OperandInfo321, -1 ,nullptr }, // Inst #12910 = V_CMPX_U_F16_sdwa_gfx10