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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18463 { 2401, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2401 = V_CMPSX_EQ_F64_nosdst_e64
18473 { 2411, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2411 = V_CMPSX_F_F64_nosdst_e64
18483 { 2421, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2421 = V_CMPSX_GE_F64_nosdst_e64
18493 { 2431, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2431 = V_CMPSX_GT_F64_nosdst_e64
18503 { 2441, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2441 = V_CMPSX_LE_F64_nosdst_e64
18513 { 2451, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2451 = V_CMPSX_LG_F64_nosdst_e64
18523 { 2461, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2461 = V_CMPSX_LT_F64_nosdst_e64
18533 { 2471, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2471 = V_CMPSX_NEQ_F64_nosdst_e64
18543 { 2481, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2481 = V_CMPSX_NGE_F64_nosdst_e64
18553 { 2491, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2491 = V_CMPSX_NGT_F64_nosdst_e64
18563 { 2501, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2501 = V_CMPSX_NLE_F64_nosdst_e64
18573 { 2511, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2511 = V_CMPSX_NLG_F64_nosdst_e64
18583 { 2521, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2521 = V_CMPSX_NLT_F64_nosdst_e64
18593 { 2531, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2531 = V_CMPSX_O_F64_nosdst_e64
18603 { 2541, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2541 = V_CMPSX_TRU_F64_nosdst_e64
18613 { 2551, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2551 = V_CMPSX_U_F64_nosdst_e64
18725 { 2663, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2663 = V_CMPX_EQ_F64_nosdst_e64
18773 { 2711, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2711 = V_CMPX_F_F64_nosdst_e64
18821 { 2759, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2759 = V_CMPX_GE_F64_nosdst_e64
18869 { 2807, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2807 = V_CMPX_GT_F64_nosdst_e64
18917 { 2855, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2855 = V_CMPX_LE_F64_nosdst_e64
18965 { 2903, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2903 = V_CMPX_LG_F64_nosdst_e64
18981 { 2919, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2919 = V_CMPX_LT_F64_nosdst_e64
19029 { 2967, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #2967 = V_CMPX_NEQ_F64_nosdst_e64
19077 { 3015, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #3015 = V_CMPX_NGE_F64_nosdst_e64
19093 { 3031, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #3031 = V_CMPX_NGT_F64_nosdst_e64
19109 { 3047, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #3047 = V_CMPX_NLE_F64_nosdst_e64
19125 { 3063, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #3063 = V_CMPX_NLG_F64_nosdst_e64
19141 { 3079, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #3079 = V_CMPX_NLT_F64_nosdst_e64
19157 { 3095, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #3095 = V_CMPX_O_F64_nosdst_e64
19173 { 3111, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #3111 = V_CMPX_TRU_F64_nosdst_e64
19221 { 3159, 5, 0, 8, 11, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #3159 = V_CMPX_U_F64_nosdst_e64
28317 { 12255, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12255 = V_CMPX_EQ_F64_e64_gfx10
28383 { 12321, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12321 = V_CMPX_F_F64_e64_gfx10
28443 { 12381, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12381 = V_CMPX_GE_F64_e64_gfx10
28509 { 12447, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12447 = V_CMPX_GT_F64_e64_gfx10
28575 { 12513, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12513 = V_CMPX_LE_F64_e64_gfx10
28641 { 12579, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12579 = V_CMPX_LG_F64_e64_gfx10
28663 { 12601, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12601 = V_CMPX_LT_F64_e64_gfx10
28729 { 12667, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12667 = V_CMPX_NEQ_F64_e64_gfx10
28795 { 12733, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12733 = V_CMPX_NGE_F64_e64_gfx10
28817 { 12755, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12755 = V_CMPX_NGT_F64_e64_gfx10
28839 { 12777, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12777 = V_CMPX_NLE_F64_e64_gfx10
28861 { 12799, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12799 = V_CMPX_NLG_F64_e64_gfx10
28883 { 12821, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12821 = V_CMPX_NLT_F64_e64_gfx10
28905 { 12843, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12843 = V_CMPX_O_F64_e64_gfx10
28927 { 12865, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12865 = V_CMPX_TRU_F64_e64_gfx10
28987 { 12925, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo317, -1 ,nullptr }, // Inst #12925 = V_CMPX_U_F64_e64_gfx10