|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18461 { 2399, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2399 = V_CMPSX_EQ_F64_e64
18471 { 2409, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2409 = V_CMPSX_F_F64_e64
18481 { 2419, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2419 = V_CMPSX_GE_F64_e64
18491 { 2429, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2429 = V_CMPSX_GT_F64_e64
18501 { 2439, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2439 = V_CMPSX_LE_F64_e64
18511 { 2449, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2449 = V_CMPSX_LG_F64_e64
18521 { 2459, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2459 = V_CMPSX_LT_F64_e64
18531 { 2469, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2469 = V_CMPSX_NEQ_F64_e64
18541 { 2479, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2479 = V_CMPSX_NGE_F64_e64
18551 { 2489, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2489 = V_CMPSX_NGT_F64_e64
18561 { 2499, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2499 = V_CMPSX_NLE_F64_e64
18571 { 2509, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2509 = V_CMPSX_NLG_F64_e64
18581 { 2519, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2519 = V_CMPSX_NLT_F64_e64
18591 { 2529, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2529 = V_CMPSX_O_F64_e64
18601 { 2539, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2539 = V_CMPSX_TRU_F64_e64
18611 { 2549, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2549 = V_CMPSX_U_F64_e64
18618 { 2556, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2556 = V_CMPS_EQ_F64_e64
18623 { 2561, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2561 = V_CMPS_F_F64_e64
18628 { 2566, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2566 = V_CMPS_GE_F64_e64
18633 { 2571, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2571 = V_CMPS_GT_F64_e64
18638 { 2576, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2576 = V_CMPS_LE_F64_e64
18643 { 2581, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2581 = V_CMPS_LG_F64_e64
18648 { 2586, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2586 = V_CMPS_LT_F64_e64
18653 { 2591, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2591 = V_CMPS_NEQ_F64_e64
18658 { 2596, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2596 = V_CMPS_NGE_F64_e64
18663 { 2601, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2601 = V_CMPS_NGT_F64_e64
18668 { 2606, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2606 = V_CMPS_NLE_F64_e64
18673 { 2611, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2611 = V_CMPS_NLG_F64_e64
18678 { 2616, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2616 = V_CMPS_NLT_F64_e64
18683 { 2621, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2621 = V_CMPS_O_F64_e64
18688 { 2626, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2626 = V_CMPS_TRU_F64_e64
18693 { 2631, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2631 = V_CMPS_U_F64_e64
18723 { 2661, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2661 = V_CMPX_EQ_F64_e64
18771 { 2709, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2709 = V_CMPX_F_F64_e64
18819 { 2757, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2757 = V_CMPX_GE_F64_e64
18867 { 2805, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2805 = V_CMPX_GT_F64_e64
18915 { 2853, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2853 = V_CMPX_LE_F64_e64
18963 { 2901, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2901 = V_CMPX_LG_F64_e64
18979 { 2917, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2917 = V_CMPX_LT_F64_e64
19027 { 2965, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #2965 = V_CMPX_NEQ_F64_e64
19075 { 3013, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #3013 = V_CMPX_NGE_F64_e64
19091 { 3029, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #3029 = V_CMPX_NGT_F64_e64
19107 { 3045, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #3045 = V_CMPX_NLE_F64_e64
19123 { 3061, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #3061 = V_CMPX_NLG_F64_e64
19139 { 3077, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #3077 = V_CMPX_NLT_F64_e64
19155 { 3093, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #3093 = V_CMPX_O_F64_e64
19171 { 3109, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #3109 = V_CMPX_TRU_F64_e64
19219 { 3157, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #3157 = V_CMPX_U_F64_e64
19237 { 3175, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3175 = V_CMP_EQ_F64_e64
19261 { 3199, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3199 = V_CMP_F_F64_e64
19285 { 3223, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3223 = V_CMP_GE_F64_e64
19309 { 3247, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3247 = V_CMP_GT_F64_e64
19333 { 3271, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3271 = V_CMP_LE_F64_e64
19357 { 3295, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3295 = V_CMP_LG_F64_e64
19365 { 3303, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3303 = V_CMP_LT_F64_e64
19389 { 3327, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3327 = V_CMP_NEQ_F64_e64
19413 { 3351, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3351 = V_CMP_NGE_F64_e64
19421 { 3359, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3359 = V_CMP_NGT_F64_e64
19429 { 3367, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3367 = V_CMP_NLE_F64_e64
19437 { 3375, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3375 = V_CMP_NLG_F64_e64
19445 { 3383, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3383 = V_CMP_NLT_F64_e64
19453 { 3391, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3391 = V_CMP_O_F64_e64
19461 { 3399, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3399 = V_CMP_TRU_F64_e64
19485 { 3423, 6, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3423 = V_CMP_U_F64_e64
28151 { 12089, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12089 = V_CMPSX_EQ_F64_e64_gfx6_gfx7
28155 { 12093, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12093 = V_CMPSX_F_F64_e64_gfx6_gfx7
28159 { 12097, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12097 = V_CMPSX_GE_F64_e64_gfx6_gfx7
28163 { 12101, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12101 = V_CMPSX_GT_F64_e64_gfx6_gfx7
28167 { 12105, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12105 = V_CMPSX_LE_F64_e64_gfx6_gfx7
28171 { 12109, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12109 = V_CMPSX_LG_F64_e64_gfx6_gfx7
28175 { 12113, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12113 = V_CMPSX_LT_F64_e64_gfx6_gfx7
28179 { 12117, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12117 = V_CMPSX_NEQ_F64_e64_gfx6_gfx7
28183 { 12121, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12121 = V_CMPSX_NGE_F64_e64_gfx6_gfx7
28187 { 12125, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12125 = V_CMPSX_NGT_F64_e64_gfx6_gfx7
28191 { 12129, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12129 = V_CMPSX_NLE_F64_e64_gfx6_gfx7
28195 { 12133, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12133 = V_CMPSX_NLG_F64_e64_gfx6_gfx7
28199 { 12137, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12137 = V_CMPSX_NLT_F64_e64_gfx6_gfx7
28203 { 12141, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12141 = V_CMPSX_O_F64_e64_gfx6_gfx7
28207 { 12145, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12145 = V_CMPSX_TRU_F64_e64_gfx6_gfx7
28211 { 12149, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12149 = V_CMPSX_U_F64_e64_gfx6_gfx7
28215 { 12153, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12153 = V_CMPS_EQ_F64_e64_gfx6_gfx7
28219 { 12157, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12157 = V_CMPS_F_F64_e64_gfx6_gfx7
28223 { 12161, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12161 = V_CMPS_GE_F64_e64_gfx6_gfx7
28227 { 12165, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12165 = V_CMPS_GT_F64_e64_gfx6_gfx7
28231 { 12169, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12169 = V_CMPS_LE_F64_e64_gfx6_gfx7
28235 { 12173, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12173 = V_CMPS_LG_F64_e64_gfx6_gfx7
28239 { 12177, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12177 = V_CMPS_LT_F64_e64_gfx6_gfx7
28243 { 12181, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12181 = V_CMPS_NEQ_F64_e64_gfx6_gfx7
28247 { 12185, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12185 = V_CMPS_NGE_F64_e64_gfx6_gfx7
28251 { 12189, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12189 = V_CMPS_NGT_F64_e64_gfx6_gfx7
28255 { 12193, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12193 = V_CMPS_NLE_F64_e64_gfx6_gfx7
28259 { 12197, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12197 = V_CMPS_NLG_F64_e64_gfx6_gfx7
28263 { 12201, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12201 = V_CMPS_NLT_F64_e64_gfx6_gfx7
28267 { 12205, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12205 = V_CMPS_O_F64_e64_gfx6_gfx7
28271 { 12209, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12209 = V_CMPS_TRU_F64_e64_gfx6_gfx7
28275 { 12213, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12213 = V_CMPS_U_F64_e64_gfx6_gfx7
28318 { 12256, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12256 = V_CMPX_EQ_F64_e64_gfx6_gfx7
28319 { 12257, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12257 = V_CMPX_EQ_F64_e64_vi
28384 { 12322, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12322 = V_CMPX_F_F64_e64_gfx6_gfx7
28385 { 12323, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12323 = V_CMPX_F_F64_e64_vi
28444 { 12382, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12382 = V_CMPX_GE_F64_e64_gfx6_gfx7
28445 { 12383, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12383 = V_CMPX_GE_F64_e64_vi
28510 { 12448, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12448 = V_CMPX_GT_F64_e64_gfx6_gfx7
28511 { 12449, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12449 = V_CMPX_GT_F64_e64_vi
28576 { 12514, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12514 = V_CMPX_LE_F64_e64_gfx6_gfx7
28577 { 12515, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12515 = V_CMPX_LE_F64_e64_vi
28642 { 12580, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12580 = V_CMPX_LG_F64_e64_gfx6_gfx7
28643 { 12581, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12581 = V_CMPX_LG_F64_e64_vi
28664 { 12602, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12602 = V_CMPX_LT_F64_e64_gfx6_gfx7
28665 { 12603, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12603 = V_CMPX_LT_F64_e64_vi
28730 { 12668, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12668 = V_CMPX_NEQ_F64_e64_gfx6_gfx7
28731 { 12669, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12669 = V_CMPX_NEQ_F64_e64_vi
28796 { 12734, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12734 = V_CMPX_NGE_F64_e64_gfx6_gfx7
28797 { 12735, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12735 = V_CMPX_NGE_F64_e64_vi
28818 { 12756, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12756 = V_CMPX_NGT_F64_e64_gfx6_gfx7
28819 { 12757, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12757 = V_CMPX_NGT_F64_e64_vi
28840 { 12778, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12778 = V_CMPX_NLE_F64_e64_gfx6_gfx7
28841 { 12779, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12779 = V_CMPX_NLE_F64_e64_vi
28862 { 12800, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12800 = V_CMPX_NLG_F64_e64_gfx6_gfx7
28863 { 12801, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12801 = V_CMPX_NLG_F64_e64_vi
28884 { 12822, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12822 = V_CMPX_NLT_F64_e64_gfx6_gfx7
28885 { 12823, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12823 = V_CMPX_NLT_F64_e64_vi
28906 { 12844, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12844 = V_CMPX_O_F64_e64_gfx6_gfx7
28907 { 12845, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12845 = V_CMPX_O_F64_e64_vi
28928 { 12866, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12866 = V_CMPX_TRU_F64_e64_gfx6_gfx7
28929 { 12867, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12867 = V_CMPX_TRU_F64_e64_vi
28988 { 12926, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12926 = V_CMPX_U_F64_e64_gfx6_gfx7
28989 { 12927, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo316, -1 ,nullptr }, // Inst #12927 = V_CMPX_U_F64_e64_vi
29031 { 12969, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12969 = V_CMP_EQ_F64_e64_gfx10
29032 { 12970, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12970 = V_CMP_EQ_F64_e64_gfx6_gfx7
29033 { 12971, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #12971 = V_CMP_EQ_F64_e64_vi
29097 { 13035, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13035 = V_CMP_F_F64_e64_gfx10
29098 { 13036, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13036 = V_CMP_F_F64_e64_gfx6_gfx7
29099 { 13037, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13037 = V_CMP_F_F64_e64_vi
29157 { 13095, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13095 = V_CMP_GE_F64_e64_gfx10
29158 { 13096, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13096 = V_CMP_GE_F64_e64_gfx6_gfx7
29159 { 13097, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13097 = V_CMP_GE_F64_e64_vi
29223 { 13161, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13161 = V_CMP_GT_F64_e64_gfx10
29224 { 13162, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13162 = V_CMP_GT_F64_e64_gfx6_gfx7
29225 { 13163, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13163 = V_CMP_GT_F64_e64_vi
29289 { 13227, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13227 = V_CMP_LE_F64_e64_gfx10
29290 { 13228, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13228 = V_CMP_LE_F64_e64_gfx6_gfx7
29291 { 13229, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13229 = V_CMP_LE_F64_e64_vi
29355 { 13293, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13293 = V_CMP_LG_F64_e64_gfx10
29356 { 13294, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13294 = V_CMP_LG_F64_e64_gfx6_gfx7
29357 { 13295, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13295 = V_CMP_LG_F64_e64_vi
29377 { 13315, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13315 = V_CMP_LT_F64_e64_gfx10
29378 { 13316, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13316 = V_CMP_LT_F64_e64_gfx6_gfx7
29379 { 13317, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13317 = V_CMP_LT_F64_e64_vi
29443 { 13381, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13381 = V_CMP_NEQ_F64_e64_gfx10
29444 { 13382, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13382 = V_CMP_NEQ_F64_e64_gfx6_gfx7
29445 { 13383, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13383 = V_CMP_NEQ_F64_e64_vi
29509 { 13447, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13447 = V_CMP_NGE_F64_e64_gfx10
29510 { 13448, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13448 = V_CMP_NGE_F64_e64_gfx6_gfx7
29511 { 13449, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13449 = V_CMP_NGE_F64_e64_vi
29531 { 13469, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13469 = V_CMP_NGT_F64_e64_gfx10
29532 { 13470, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13470 = V_CMP_NGT_F64_e64_gfx6_gfx7
29533 { 13471, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13471 = V_CMP_NGT_F64_e64_vi
29553 { 13491, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13491 = V_CMP_NLE_F64_e64_gfx10
29554 { 13492, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13492 = V_CMP_NLE_F64_e64_gfx6_gfx7
29555 { 13493, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13493 = V_CMP_NLE_F64_e64_vi
29575 { 13513, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13513 = V_CMP_NLG_F64_e64_gfx10
29576 { 13514, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13514 = V_CMP_NLG_F64_e64_gfx6_gfx7
29577 { 13515, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13515 = V_CMP_NLG_F64_e64_vi
29597 { 13535, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13535 = V_CMP_NLT_F64_e64_gfx10
29598 { 13536, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13536 = V_CMP_NLT_F64_e64_gfx6_gfx7
29599 { 13537, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13537 = V_CMP_NLT_F64_e64_vi
29619 { 13557, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13557 = V_CMP_O_F64_e64_gfx10
29620 { 13558, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13558 = V_CMP_O_F64_e64_gfx6_gfx7
29621 { 13559, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13559 = V_CMP_O_F64_e64_vi
29641 { 13579, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13579 = V_CMP_TRU_F64_e64_gfx10
29642 { 13580, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13580 = V_CMP_TRU_F64_e64_gfx6_gfx7
29643 { 13581, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13581 = V_CMP_TRU_F64_e64_vi
29701 { 13639, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13639 = V_CMP_U_F64_e64_gfx10
29702 { 13640, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13640 = V_CMP_U_F64_e64_gfx6_gfx7
29703 { 13641, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13641 = V_CMP_U_F64_e64_vi