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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18457 { 2395, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2395 = V_CMPSX_EQ_F32_nosdst_e64
18467 { 2405, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2405 = V_CMPSX_F_F32_nosdst_e64
18477 { 2415, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2415 = V_CMPSX_GE_F32_nosdst_e64
18487 { 2425, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2425 = V_CMPSX_GT_F32_nosdst_e64
18497 { 2435, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2435 = V_CMPSX_LE_F32_nosdst_e64
18507 { 2445, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2445 = V_CMPSX_LG_F32_nosdst_e64
18517 { 2455, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2455 = V_CMPSX_LT_F32_nosdst_e64
18527 { 2465, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2465 = V_CMPSX_NEQ_F32_nosdst_e64
18537 { 2475, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2475 = V_CMPSX_NGE_F32_nosdst_e64
18547 { 2485, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2485 = V_CMPSX_NGT_F32_nosdst_e64
18557 { 2495, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2495 = V_CMPSX_NLE_F32_nosdst_e64
18567 { 2505, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2505 = V_CMPSX_NLG_F32_nosdst_e64
18577 { 2515, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2515 = V_CMPSX_NLT_F32_nosdst_e64
18587 { 2525, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2525 = V_CMPSX_O_F32_nosdst_e64
18597 { 2535, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2535 = V_CMPSX_TRU_F32_nosdst_e64
18607 { 2545, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2545 = V_CMPSX_U_F32_nosdst_e64
18719 { 2657, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2657 = V_CMPX_EQ_F32_nosdst_e64
18767 { 2705, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2705 = V_CMPX_F_F32_nosdst_e64
18815 { 2753, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2753 = V_CMPX_GE_F32_nosdst_e64
18863 { 2801, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2801 = V_CMPX_GT_F32_nosdst_e64
18911 { 2849, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2849 = V_CMPX_LE_F32_nosdst_e64
18959 { 2897, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2897 = V_CMPX_LG_F32_nosdst_e64
18975 { 2913, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2913 = V_CMPX_LT_F32_nosdst_e64
19023 { 2961, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #2961 = V_CMPX_NEQ_F32_nosdst_e64
19071 { 3009, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #3009 = V_CMPX_NGE_F32_nosdst_e64
19087 { 3025, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #3025 = V_CMPX_NGT_F32_nosdst_e64
19103 { 3041, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #3041 = V_CMPX_NLE_F32_nosdst_e64
19119 { 3057, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #3057 = V_CMPX_NLG_F32_nosdst_e64
19135 { 3073, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #3073 = V_CMPX_NLT_F32_nosdst_e64
19151 { 3089, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #3089 = V_CMPX_O_F32_nosdst_e64
19167 { 3105, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #3105 = V_CMPX_TRU_F32_nosdst_e64
19215 { 3153, 5, 0, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #3153 = V_CMPX_U_F32_nosdst_e64
28308 { 12246, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12246 = V_CMPX_EQ_F32_e64_gfx10
28374 { 12312, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12312 = V_CMPX_F_F32_e64_gfx10
28434 { 12372, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12372 = V_CMPX_GE_F32_e64_gfx10
28500 { 12438, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12438 = V_CMPX_GT_F32_e64_gfx10
28566 { 12504, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12504 = V_CMPX_LE_F32_e64_gfx10
28632 { 12570, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12570 = V_CMPX_LG_F32_e64_gfx10
28654 { 12592, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12592 = V_CMPX_LT_F32_e64_gfx10
28720 { 12658, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12658 = V_CMPX_NEQ_F32_e64_gfx10
28786 { 12724, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12724 = V_CMPX_NGE_F32_e64_gfx10
28808 { 12746, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12746 = V_CMPX_NGT_F32_e64_gfx10
28830 { 12768, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12768 = V_CMPX_NLE_F32_e64_gfx10
28852 { 12790, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12790 = V_CMPX_NLG_F32_e64_gfx10
28874 { 12812, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12812 = V_CMPX_NLT_F32_e64_gfx10
28896 { 12834, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12834 = V_CMPX_O_F32_e64_gfx10
28918 { 12856, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12856 = V_CMPX_TRU_F32_e64_gfx10
28978 { 12916, 5, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc00000000402ULL, ImplicitList2, ImplicitList2, OperandInfo312, -1 ,nullptr }, // Inst #12916 = V_CMPX_U_F32_e64_gfx10