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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18449 { 2387, 8, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #2387 = V_CEIL_F32_sdwa
19498 { 3436, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3436 = V_COS_F32_sdwa
19506 { 3444, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3444 = V_CVT_F16_F32_sdwa
19640 { 3578, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3578 = V_EXP_F32_sdwa
19644 { 3582, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3582 = V_EXP_LEGACY_F32_sdwa
19664 { 3602, 8, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3602 = V_FLOOR_F32_sdwa
19693 { 3631, 8, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3631 = V_FRACT_F32_sdwa
19713 { 3651, 8, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3651 = V_FREXP_MANT_F32_sdwa
19738 { 3676, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3676 = V_LOG_CLAMP_F32_sdwa
19746 { 3684, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3684 = V_LOG_F32_sdwa
19750 { 3688, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3688 = V_LOG_LEGACY_F32_sdwa
20025 { 3963, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3963 = V_RCP_CLAMP_F32_sdwa
20035 { 3973, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3973 = V_RCP_F32_sdwa
20041 { 3979, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3979 = V_RCP_IFLAG_F32_sdwa
20045 { 3983, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3983 = V_RCP_LEGACY_F32_sdwa
20054 { 3992, 8, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3992 = V_RNDNE_F32_sdwa
20060 { 3998, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3998 = V_RSQ_CLAMP_F32_sdwa
20070 { 4008, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #4008 = V_RSQ_F32_sdwa
20076 { 4014, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #4014 = V_RSQ_LEGACY_F32_sdwa
20098 { 4036, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #4036 = V_SIN_F32_sdwa
20106 { 4044, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #4044 = V_SQRT_F32_sdwa
20169 { 4107, 8, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #4107 = V_TRUNC_F32_sdwa
28133 { 12071, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #12071 = V_CEIL_F32_sdwa_gfx10
28134 { 12072, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #12072 = V_CEIL_F32_sdwa_gfx9
28135 { 12073, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #12073 = V_CEIL_F32_sdwa_vi
29741 { 13679, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #13679 = V_COS_F32_sdwa_gfx10
29742 { 13680, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #13680 = V_COS_F32_sdwa_gfx9
29743 { 13681, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #13681 = V_COS_F32_sdwa_vi
29765 { 13703, 8, 1, 8, 12, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #13703 = V_CVT_F16_F32_sdwa_gfx10
29766 { 13704, 8, 1, 8, 12, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #13704 = V_CVT_F16_F32_sdwa_gfx9
29767 { 13705, 8, 1, 8, 12, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #13705 = V_CVT_F16_F32_sdwa_vi
30108 { 14046, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14046 = V_EXP_F32_sdwa_gfx10
30109 { 14047, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14047 = V_EXP_F32_sdwa_gfx9
30110 { 14048, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14048 = V_EXP_F32_sdwa_vi
30116 { 14054, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14054 = V_EXP_LEGACY_F32_sdwa_gfx9
30117 { 14055, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14055 = V_EXP_LEGACY_F32_sdwa_vi
30173 { 14111, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14111 = V_FLOOR_F32_sdwa_gfx10
30174 { 14112, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14112 = V_FLOOR_F32_sdwa_gfx9
30175 { 14113, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14113 = V_FLOOR_F32_sdwa_vi
30233 { 14171, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14171 = V_FRACT_F32_sdwa_gfx10
30234 { 14172, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14172 = V_FRACT_F32_sdwa_gfx9
30235 { 14173, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14173 = V_FRACT_F32_sdwa_vi
30289 { 14227, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14227 = V_FREXP_MANT_F32_sdwa_gfx10
30290 { 14228, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14228 = V_FREXP_MANT_F32_sdwa_gfx9
30291 { 14229, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14229 = V_FREXP_MANT_F32_sdwa_vi
30365 { 14303, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14303 = V_LOG_F32_sdwa_gfx10
30366 { 14304, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14304 = V_LOG_F32_sdwa_gfx9
30367 { 14305, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14305 = V_LOG_F32_sdwa_vi
30373 { 14311, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14311 = V_LOG_LEGACY_F32_sdwa_gfx9
30374 { 14312, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14312 = V_LOG_LEGACY_F32_sdwa_vi
30957 { 14895, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14895 = V_RCP_F32_sdwa_gfx10
30958 { 14896, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14896 = V_RCP_F32_sdwa_gfx9
30959 { 14897, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14897 = V_RCP_F32_sdwa_vi
30975 { 14913, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14913 = V_RCP_IFLAG_F32_sdwa_gfx10
30976 { 14914, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14914 = V_RCP_IFLAG_F32_sdwa_gfx9
30977 { 14915, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14915 = V_RCP_IFLAG_F32_sdwa_vi
31003 { 14941, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14941 = V_RNDNE_F32_sdwa_gfx10
31004 { 14942, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14942 = V_RNDNE_F32_sdwa_gfx9
31005 { 14943, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14943 = V_RNDNE_F32_sdwa_vi
31035 { 14973, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14973 = V_RSQ_F32_sdwa_gfx10
31036 { 14974, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14974 = V_RSQ_F32_sdwa_gfx9
31037 { 14975, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14975 = V_RSQ_F32_sdwa_vi
31091 { 15029, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #15029 = V_SIN_F32_sdwa_gfx10
31092 { 15030, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #15030 = V_SIN_F32_sdwa_gfx9
31093 { 15031, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #15031 = V_SIN_F32_sdwa_vi
31113 { 15051, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #15051 = V_SQRT_F32_sdwa_gfx10
31114 { 15052, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #15052 = V_SQRT_F32_sdwa_gfx9
31115 { 15053, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #15053 = V_SQRT_F32_sdwa_vi
31288 { 15226, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #15226 = V_TRUNC_F32_sdwa_gfx10
31289 { 15227, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #15227 = V_TRUNC_F32_sdwa_gfx9
31290 { 15228, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #15228 = V_TRUNC_F32_sdwa_vi