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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18445 { 2383, 8, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #2383 = V_CEIL_F16_sdwa
19494 { 3432, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #3432 = V_COS_F16_sdwa
19518 { 3456, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #3456 = V_CVT_F32_F16_sdwa
19636 { 3574, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #3574 = V_EXP_F16_sdwa
19660 { 3598, 8, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #3598 = V_FLOOR_F16_sdwa
19689 { 3627, 8, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #3627 = V_FRACT_F16_sdwa
19709 { 3647, 8, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #3647 = V_FREXP_MANT_F16_sdwa
19742 { 3680, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #3680 = V_LOG_F16_sdwa
20031 { 3969, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #3969 = V_RCP_F16_sdwa
20050 { 3988, 8, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #3988 = V_RNDNE_F16_sdwa
20066 { 4004, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #4004 = V_RSQ_F16_sdwa
20094 { 4032, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #4032 = V_SIN_F16_sdwa
20102 { 4040, 8, 1, 8, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #4040 = V_SQRT_F16_sdwa
20165 { 4103, 8, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #4103 = V_TRUNC_F16_sdwa
28121 { 12059, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #12059 = V_CEIL_F16_sdwa_gfx10
28122 { 12060, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #12060 = V_CEIL_F16_sdwa_gfx9
28123 { 12061, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #12061 = V_CEIL_F16_sdwa_vi
29729 { 13667, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #13667 = V_COS_F16_sdwa_gfx10
29730 { 13668, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #13668 = V_COS_F16_sdwa_gfx9
29731 { 13669, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #13669 = V_COS_F16_sdwa_vi
29797 { 13735, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #13735 = V_CVT_F32_F16_sdwa_gfx10
29798 { 13736, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #13736 = V_CVT_F32_F16_sdwa_gfx9
29799 { 13737, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #13737 = V_CVT_F32_F16_sdwa_vi
30096 { 14034, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14034 = V_EXP_F16_sdwa_gfx10
30097 { 14035, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14035 = V_EXP_F16_sdwa_gfx9
30098 { 14036, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14036 = V_EXP_F16_sdwa_vi
30161 { 14099, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14099 = V_FLOOR_F16_sdwa_gfx10
30162 { 14100, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14100 = V_FLOOR_F16_sdwa_gfx9
30163 { 14101, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14101 = V_FLOOR_F16_sdwa_vi
30221 { 14159, 8, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14159 = V_FRACT_F16_sdwa_gfx10
30222 { 14160, 8, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14160 = V_FRACT_F16_sdwa_gfx9
30223 { 14161, 8, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14161 = V_FRACT_F16_sdwa_vi
30277 { 14215, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14215 = V_FREXP_MANT_F16_sdwa_gfx10
30278 { 14216, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14216 = V_FREXP_MANT_F16_sdwa_gfx9
30279 { 14217, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14217 = V_FREXP_MANT_F16_sdwa_vi
30353 { 14291, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14291 = V_LOG_F16_sdwa_gfx10
30354 { 14292, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14292 = V_LOG_F16_sdwa_gfx9
30355 { 14293, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14293 = V_LOG_F16_sdwa_vi
30945 { 14883, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14883 = V_RCP_F16_sdwa_gfx10
30946 { 14884, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14884 = V_RCP_F16_sdwa_gfx9
30947 { 14885, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14885 = V_RCP_F16_sdwa_vi
30991 { 14929, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14929 = V_RNDNE_F16_sdwa_gfx10
30992 { 14930, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14930 = V_RNDNE_F16_sdwa_gfx9
30993 { 14931, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14931 = V_RNDNE_F16_sdwa_vi
31023 { 14961, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14961 = V_RSQ_F16_sdwa_gfx10
31024 { 14962, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14962 = V_RSQ_F16_sdwa_gfx9
31025 { 14963, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14963 = V_RSQ_F16_sdwa_vi
31079 { 15017, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #15017 = V_SIN_F16_sdwa_gfx10
31080 { 15018, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #15018 = V_SIN_F16_sdwa_gfx9
31081 { 15019, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #15019 = V_SIN_F16_sdwa_vi
31101 { 15039, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #15039 = V_SQRT_F16_sdwa_gfx10
31102 { 15040, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #15040 = V_SQRT_F16_sdwa_gfx9
31103 { 15041, 8, 1, 8, 12, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #15041 = V_SQRT_F16_sdwa_vi
31276 { 15214, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #15214 = V_TRUNC_F16_sdwa_gfx10
31277 { 15215, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #15215 = V_TRUNC_F16_sdwa_gfx9
31278 { 15216, 8, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #15216 = V_TRUNC_F16_sdwa_vi