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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18404 { 2342, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #2342 = V_ADD_U16_e64
18419 { 2357, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #2357 = V_ASHRREV_I16_e64
19753 { 3691, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3691 = V_LSHLREV_B16_e64
19769 { 3707, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3707 = V_LSHRREV_B16_e64
19831 { 3769, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3769 = V_MAX_I16_e64
19843 { 3781, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3781 = V_MAX_U16_e64
19896 { 3834, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3834 = V_MIN_I16_e64
19908 { 3846, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3846 = V_MIN_U16_e64
19972 { 3910, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3910 = V_MUL_LO_U16_e64
20131 { 4069, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #4069 = V_SUBREV_U16_e64
20153 { 4091, 3, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #4091 = V_SUB_U16_e64
28023 { 11961, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #11961 = V_ADD_NC_U16_gfx10
28031 { 11969, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #11969 = V_ADD_U16_e64_vi
28064 { 12002, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #12002 = V_ASHRREV_I16_e64_vi
28065 { 12003, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #12003 = V_ASHRREV_I16_gfx10
30377 { 14315, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14315 = V_LSHLREV_B16_e64_vi
30378 { 14316, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14316 = V_LSHLREV_B16_gfx10
30404 { 14342, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14342 = V_LSHRREV_B16_e64_vi
30405 { 14343, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14343 = V_LSHRREV_B16_gfx10
30532 { 14470, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14470 = V_MAX_I16_e64_vi
30533 { 14471, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14471 = V_MAX_I16_gfx10
30552 { 14490, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14490 = V_MAX_U16_e64_vi
30553 { 14491, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14491 = V_MAX_U16_gfx10
30653 { 14591, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14591 = V_MIN_I16_e64_vi
30654 { 14592, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14592 = V_MIN_I16_gfx10
30673 { 14611, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14611 = V_MIN_U16_e64_vi
30674 { 14612, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14612 = V_MIN_U16_gfx10
30828 { 14766, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14766 = V_MUL_LO_U16_e64_vi
30829 { 14767, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14767 = V_MUL_LO_U16_gfx10
31189 { 15127, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #15127 = V_SUBREV_U16_e64_vi
31244 { 15182, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #15182 = V_SUB_NC_U16_gfx10
31252 { 15190, 3, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList2, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #15190 = V_SUB_U16_e64_vi