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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18394 { 2332, 7, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x10a00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #2332 = V_ADD_F64
19828 { 3766, 7, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #3766 = V_MAX_F64
19893 { 3831, 7, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #3831 = V_MIN_F64
19950 { 3888, 7, 1, 8, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x10a00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #3888 = V_MUL_F64
28012 { 11950, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #11950 = V_ADD_F64_gfx10
28013 { 11951, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #11951 = V_ADD_F64_gfx6_gfx7
28014 { 11952, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #11952 = V_ADD_F64_vi
30527 { 14465, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #14465 = V_MAX_F64_gfx10
30528 { 14466, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #14466 = V_MAX_F64_gfx6_gfx7
30529 { 14467, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #14467 = V_MAX_F64_vi
30648 { 14586, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #14586 = V_MIN_F64_gfx10
30649 { 14587, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #14587 = V_MIN_F64_gfx6_gfx7
30650 { 14588, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #14588 = V_MIN_F64_vi
30766 { 14704, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #14704 = V_MUL_F64_gfx10
30767 { 14705, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #14705 = V_MUL_F64_gfx6_gfx7
30768 { 14706, 7, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a00000000402ULL, ImplicitList2, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #14706 = V_MUL_F64_vi