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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18393 { 2331, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #2331 = V_ADD_F32_sdwa
19792 { 3730, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #3730 = V_MAC_LEGACY_F32_sdwa
19827 { 3765, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #3765 = V_MAX_F32_sdwa
19840 { 3778, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #3778 = V_MAX_LEGACY_F32_sdwa
19892 { 3830, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #3830 = V_MIN_F32_sdwa
19905 { 3843, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #3843 = V_MIN_LEGACY_F32_sdwa
19949 { 3887, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #3887 = V_MUL_F32_sdwa
19968 { 3906, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #3906 = V_MUL_LEGACY_F32_sdwa
20005 { 3943, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #3943 = V_PK_FMAC_F16_sdwa
20124 { 4062, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #4062 = V_SUBREV_F32_sdwa
20144 { 4082, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #4082 = V_SUB_F32_sdwa
28009 { 11947, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #11947 = V_ADD_F32_sdwa_gfx10
28010 { 11948, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #11948 = V_ADD_F32_sdwa_gfx9
28011 { 11949, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #11949 = V_ADD_F32_sdwa_vi
30445 { 14383, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14383 = V_MAC_LEGACY_F32_sdwa_gfx10
30524 { 14462, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14462 = V_MAX_F32_sdwa_gfx10
30525 { 14463, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14463 = V_MAX_F32_sdwa_gfx9
30526 { 14464, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14464 = V_MAX_F32_sdwa_vi
30645 { 14583, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14583 = V_MIN_F32_sdwa_gfx10
30646 { 14584, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14584 = V_MIN_F32_sdwa_gfx9
30647 { 14585, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14585 = V_MIN_F32_sdwa_vi
30763 { 14701, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14701 = V_MUL_F32_sdwa_gfx10
30764 { 14702, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14702 = V_MUL_F32_sdwa_gfx9
30765 { 14703, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14703 = V_MUL_F32_sdwa_vi
30820 { 14758, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14758 = V_MUL_LEGACY_F32_sdwa_gfx10
30821 { 14759, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14759 = V_MUL_LEGACY_F32_sdwa_gfx9
30822 { 14760, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14760 = V_MUL_LEGACY_F32_sdwa_vi
31177 { 15115, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #15115 = V_SUBREV_F32_sdwa_gfx10
31178 { 15116, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #15116 = V_SUBREV_F32_sdwa_gfx9
31179 { 15117, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #15117 = V_SUBREV_F32_sdwa_vi
31235 { 15173, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #15173 = V_SUB_F32_sdwa_gfx10
31236 { 15174, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #15174 = V_SUB_F32_sdwa_gfx9
31237 { 15175, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #15175 = V_SUB_F32_sdwa_vi