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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18389 { 2327, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #2327 = V_ADD_F16_sdwa
19730 { 3668, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #3668 = V_LDEXP_F16_sdwa
19823 { 3761, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #3761 = V_MAX_F16_sdwa
19888 { 3826, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x4002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #3826 = V_MIN_F16_sdwa
19945 { 3883, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #3883 = V_MUL_F16_sdwa
20120 { 4058, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #4058 = V_SUBREV_F16_sdwa
20140 { 4078, 11, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #4078 = V_SUB_F16_sdwa
27997 { 11935, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11935 = V_ADD_F16_sdwa_gfx10
27998 { 11936, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11936 = V_ADD_F16_sdwa_gfx9
27999 { 11937, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11937 = V_ADD_F16_sdwa_vi
30331 { 14269, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14269 = V_LDEXP_F16_sdwa_gfx10
30332 { 14270, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14270 = V_LDEXP_F16_sdwa_gfx9
30333 { 14271, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14271 = V_LDEXP_F16_sdwa_vi
30512 { 14450, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14450 = V_MAX_F16_sdwa_gfx10
30513 { 14451, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14451 = V_MAX_F16_sdwa_gfx9
30514 { 14452, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14452 = V_MAX_F16_sdwa_vi
30633 { 14571, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14571 = V_MIN_F16_sdwa_gfx10
30634 { 14572, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14572 = V_MIN_F16_sdwa_gfx9
30635 { 14573, 11, 1, 8, 2, 0, 0x4002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14573 = V_MIN_F16_sdwa_vi
30751 { 14689, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14689 = V_MUL_F16_sdwa_gfx10
30752 { 14690, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14690 = V_MUL_F16_sdwa_gfx9
30753 { 14691, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14691 = V_MUL_F16_sdwa_vi
31165 { 15103, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #15103 = V_SUBREV_F16_sdwa_gfx10
31166 { 15104, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #15104 = V_SUBREV_F16_sdwa_gfx9
31167 { 15105, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #15105 = V_SUBREV_F16_sdwa_vi
31223 { 15161, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #15161 = V_SUB_F16_sdwa_gfx10
31224 { 15162, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #15162 = V_SUB_F16_sdwa_gfx9
31225 { 15163, 11, 1, 8, 2, 0, 0x10000000004002ULL, ImplicitList2, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #15163 = V_SUB_F16_sdwa_vi