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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18172 { 2110, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #2110 = TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_ADDR64
18173 { 2111, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #2111 = TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_BOTHEN
18174 { 2112, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4001300020000ULL, ImplicitList2, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #2112 = TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_BOTHEN_exact
18235 { 2173, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x300020000ULL, ImplicitList2, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #2173 = TBUFFER_LOAD_FORMAT_XYZW_ADDR64
18236 { 2174, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x300020000ULL, ImplicitList2, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #2174 = TBUFFER_LOAD_FORMAT_XYZW_BOTHEN
18237 { 2175, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x1300020000ULL, ImplicitList2, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #2175 = TBUFFER_LOAD_FORMAT_XYZW_BOTHEN_exact
18280 { 2218, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #2218 = TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_ADDR64
18281 { 2219, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #2219 = TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_BOTHEN
18282 { 2220, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4001300020000ULL, ImplicitList2, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #2220 = TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_BOTHEN_exact
18343 { 2281, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x300020000ULL, ImplicitList2, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #2281 = TBUFFER_STORE_FORMAT_XYZW_ADDR64
18344 { 2282, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x300020000ULL, ImplicitList2, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #2282 = TBUFFER_STORE_FORMAT_XYZW_BOTHEN
18345 { 2283, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1300020000ULL, ImplicitList2, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #2283 = TBUFFER_STORE_FORMAT_XYZW_BOTHEN_exact
27768 { 11706, 11, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #11706 = TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_BOTHEN_gfx80
27808 { 11746, 11, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #11746 = TBUFFER_LOAD_FORMAT_XYZW_ADDR64_gfx6_gfx7
27809 { 11747, 11, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #11747 = TBUFFER_LOAD_FORMAT_XYZW_BOTHEN_gfx10
27810 { 11748, 11, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #11748 = TBUFFER_LOAD_FORMAT_XYZW_BOTHEN_gfx6_gfx7
27811 { 11749, 11, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #11749 = TBUFFER_LOAD_FORMAT_XYZW_BOTHEN_vi
27868 { 11806, 11, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #11806 = TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_BOTHEN_gfx80
27908 { 11846, 11, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #11846 = TBUFFER_STORE_FORMAT_XYZW_ADDR64_gfx6_gfx7
27909 { 11847, 11, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #11847 = TBUFFER_STORE_FORMAT_XYZW_BOTHEN_gfx10
27910 { 11848, 11, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #11848 = TBUFFER_STORE_FORMAT_XYZW_BOTHEN_gfx6_gfx7
27911 { 11849, 11, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo265, -1 ,nullptr }, // Inst #11849 = TBUFFER_STORE_FORMAT_XYZW_BOTHEN_vi