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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18170 { 2108, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2108 = TBUFFER_LOAD_FORMAT_D16_XYZW_OFFSET
18171 { 2109, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4001300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2109 = TBUFFER_LOAD_FORMAT_D16_XYZW_OFFSET_exact
18188 { 2126, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2126 = TBUFFER_LOAD_FORMAT_D16_XYZ_OFFSET
18189 { 2127, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4001300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2127 = TBUFFER_LOAD_FORMAT_D16_XYZ_OFFSET_exact
18215 { 2153, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2153 = TBUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFSET
18216 { 2154, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4001300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2154 = TBUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFSET_exact
18260 { 2198, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2198 = TBUFFER_LOAD_FORMAT_XY_OFFSET
18261 { 2199, 10, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x1300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2199 = TBUFFER_LOAD_FORMAT_XY_OFFSET_exact
18278 { 2216, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2216 = TBUFFER_STORE_FORMAT_D16_XYZW_OFFSET
18279 { 2217, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4001300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2217 = TBUFFER_STORE_FORMAT_D16_XYZW_OFFSET_exact
18296 { 2234, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2234 = TBUFFER_STORE_FORMAT_D16_XYZ_OFFSET
18297 { 2235, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4001300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2235 = TBUFFER_STORE_FORMAT_D16_XYZ_OFFSET_exact
18323 { 2261, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2261 = TBUFFER_STORE_FORMAT_D16_XY_gfx80_OFFSET
18324 { 2262, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4001300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2262 = TBUFFER_STORE_FORMAT_D16_XY_gfx80_OFFSET_exact
18368 { 2306, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2306 = TBUFFER_STORE_FORMAT_XY_OFFSET
18369 { 2307, 10, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1300020000ULL, ImplicitList2, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #2307 = TBUFFER_STORE_FORMAT_XY_OFFSET_exact
27766 { 11704, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11704 = TBUFFER_LOAD_FORMAT_D16_XYZW_OFFSET_gfx10
27767 { 11705, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11705 = TBUFFER_LOAD_FORMAT_D16_XYZW_OFFSET_vi
27778 { 11716, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11716 = TBUFFER_LOAD_FORMAT_D16_XYZ_OFFSET_gfx10
27779 { 11717, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11717 = TBUFFER_LOAD_FORMAT_D16_XYZ_OFFSET_vi
27795 { 11733, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11733 = TBUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFSET_gfx80
27844 { 11782, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11782 = TBUFFER_LOAD_FORMAT_XY_OFFSET_gfx10
27845 { 11783, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11783 = TBUFFER_LOAD_FORMAT_XY_OFFSET_gfx6_gfx7
27846 { 11784, 10, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11784 = TBUFFER_LOAD_FORMAT_XY_OFFSET_vi
27866 { 11804, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11804 = TBUFFER_STORE_FORMAT_D16_XYZW_OFFSET_gfx10
27867 { 11805, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11805 = TBUFFER_STORE_FORMAT_D16_XYZW_OFFSET_vi
27878 { 11816, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11816 = TBUFFER_STORE_FORMAT_D16_XYZ_OFFSET_gfx10
27879 { 11817, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11817 = TBUFFER_STORE_FORMAT_D16_XYZ_OFFSET_vi
27895 { 11833, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11833 = TBUFFER_STORE_FORMAT_D16_XY_gfx80_OFFSET_gfx80
27944 { 11882, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11882 = TBUFFER_STORE_FORMAT_XY_OFFSET_gfx10
27945 { 11883, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11883 = TBUFFER_STORE_FORMAT_XY_OFFSET_gfx6_gfx7
27946 { 11884, 10, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo264, -1 ,nullptr }, // Inst #11884 = TBUFFER_STORE_FORMAT_XY_OFFSET_vi