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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc18163 { 2101, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2101 = TBUFFER_LOAD_FORMAT_D16_XYZW_ADDR64
18164 { 2102, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2102 = TBUFFER_LOAD_FORMAT_D16_XYZW_BOTHEN
18165 { 2103, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4001300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2103 = TBUFFER_LOAD_FORMAT_D16_XYZW_BOTHEN_exact
18181 { 2119, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2119 = TBUFFER_LOAD_FORMAT_D16_XYZ_ADDR64
18182 { 2120, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2120 = TBUFFER_LOAD_FORMAT_D16_XYZ_BOTHEN
18183 { 2121, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4001300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2121 = TBUFFER_LOAD_FORMAT_D16_XYZ_BOTHEN_exact
18208 { 2146, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2146 = TBUFFER_LOAD_FORMAT_D16_XY_gfx80_ADDR64
18209 { 2147, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2147 = TBUFFER_LOAD_FORMAT_D16_XY_gfx80_BOTHEN
18210 { 2148, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4001300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2148 = TBUFFER_LOAD_FORMAT_D16_XY_gfx80_BOTHEN_exact
18253 { 2191, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2191 = TBUFFER_LOAD_FORMAT_XY_ADDR64
18254 { 2192, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2192 = TBUFFER_LOAD_FORMAT_XY_BOTHEN
18255 { 2193, 11, 1, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x1300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2193 = TBUFFER_LOAD_FORMAT_XY_BOTHEN_exact
18271 { 2209, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2209 = TBUFFER_STORE_FORMAT_D16_XYZW_ADDR64
18272 { 2210, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2210 = TBUFFER_STORE_FORMAT_D16_XYZW_BOTHEN
18273 { 2211, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4001300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2211 = TBUFFER_STORE_FORMAT_D16_XYZW_BOTHEN_exact
18289 { 2227, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2227 = TBUFFER_STORE_FORMAT_D16_XYZ_ADDR64
18290 { 2228, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2228 = TBUFFER_STORE_FORMAT_D16_XYZ_BOTHEN
18291 { 2229, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4001300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2229 = TBUFFER_STORE_FORMAT_D16_XYZ_BOTHEN_exact
18316 { 2254, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2254 = TBUFFER_STORE_FORMAT_D16_XY_gfx80_ADDR64
18317 { 2255, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4000300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2255 = TBUFFER_STORE_FORMAT_D16_XY_gfx80_BOTHEN
18318 { 2256, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x4001300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2256 = TBUFFER_STORE_FORMAT_D16_XY_gfx80_BOTHEN_exact
18361 { 2299, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2299 = TBUFFER_STORE_FORMAT_XY_ADDR64
18362 { 2300, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2300 = TBUFFER_STORE_FORMAT_XY_BOTHEN
18363 { 2301, 11, 0, 8, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1300020000ULL, ImplicitList2, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2301 = TBUFFER_STORE_FORMAT_XY_BOTHEN_exact
27760 { 11698, 11, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11698 = TBUFFER_LOAD_FORMAT_D16_XYZW_BOTHEN_gfx10
27761 { 11699, 11, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11699 = TBUFFER_LOAD_FORMAT_D16_XYZW_BOTHEN_vi
27772 { 11710, 11, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11710 = TBUFFER_LOAD_FORMAT_D16_XYZ_BOTHEN_gfx10
27773 { 11711, 11, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11711 = TBUFFER_LOAD_FORMAT_D16_XYZ_BOTHEN_vi
27792 { 11730, 11, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11730 = TBUFFER_LOAD_FORMAT_D16_XY_gfx80_BOTHEN_gfx80
27834 { 11772, 11, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11772 = TBUFFER_LOAD_FORMAT_XY_ADDR64_gfx6_gfx7
27835 { 11773, 11, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11773 = TBUFFER_LOAD_FORMAT_XY_BOTHEN_gfx10
27836 { 11774, 11, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11774 = TBUFFER_LOAD_FORMAT_XY_BOTHEN_gfx6_gfx7
27837 { 11775, 11, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11775 = TBUFFER_LOAD_FORMAT_XY_BOTHEN_vi
27860 { 11798, 11, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11798 = TBUFFER_STORE_FORMAT_D16_XYZW_BOTHEN_gfx10
27861 { 11799, 11, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11799 = TBUFFER_STORE_FORMAT_D16_XYZW_BOTHEN_vi
27872 { 11810, 11, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11810 = TBUFFER_STORE_FORMAT_D16_XYZ_BOTHEN_gfx10
27873 { 11811, 11, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11811 = TBUFFER_STORE_FORMAT_D16_XYZ_BOTHEN_vi
27892 { 11830, 11, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11830 = TBUFFER_STORE_FORMAT_D16_XY_gfx80_BOTHEN_gfx80
27934 { 11872, 11, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11872 = TBUFFER_STORE_FORMAT_XY_ADDR64_gfx6_gfx7
27935 { 11873, 11, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11873 = TBUFFER_STORE_FORMAT_XY_BOTHEN_gfx10
27936 { 11874, 11, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11874 = TBUFFER_STORE_FORMAT_XY_BOTHEN_gfx6_gfx7
27937 { 11875, 11, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300020000ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #11875 = TBUFFER_STORE_FORMAT_XY_BOTHEN_vi