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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc17868 { 1806, 2, 1, 4, 1, 0|(1ULL<<MCID::Pseudo), 0x5ULL, nullptr, ImplicitList1, OperandInfo216, -1 ,nullptr }, // Inst #1806 = S_BCNT0_I32_B64
17870 { 1808, 2, 1, 4, 1, 0|(1ULL<<MCID::Pseudo), 0x5ULL, nullptr, ImplicitList1, OperandInfo216, -1 ,nullptr }, // Inst #1808 = S_BCNT1_I32_B64
18034 { 1972, 2, 1, 4, 1, 0|(1ULL<<MCID::Pseudo), 0x5ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1972 = S_FF0_I32_B64
18036 { 1974, 2, 1, 4, 1, 0|(1ULL<<MCID::Pseudo), 0x5ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1974 = S_FF1_I32_B64
18039 { 1977, 2, 1, 4, 1, 0|(1ULL<<MCID::Pseudo), 0x5ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1977 = S_FLBIT_I32_B64
18040 { 1978, 2, 1, 4, 1, 0|(1ULL<<MCID::Pseudo), 0x5ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1978 = S_FLBIT_I32_I64
27011 { 10949, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #10949 = S_BCNT0_I32_B64_gfx10
27012 { 10950, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #10950 = S_BCNT0_I32_B64_gfx6_gfx7
27013 { 10951, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #10951 = S_BCNT0_I32_B64_vi
27017 { 10955, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #10955 = S_BCNT1_I32_B64_gfx10
27018 { 10956, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #10956 = S_BCNT1_I32_B64_gfx6_gfx7
27019 { 10957, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #10957 = S_BCNT1_I32_B64_vi
27438 { 11376, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #11376 = S_FF0_I32_B64_gfx10
27439 { 11377, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #11377 = S_FF0_I32_B64_gfx6_gfx7
27440 { 11378, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #11378 = S_FF0_I32_B64_vi
27444 { 11382, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #11382 = S_FF1_I32_B64_gfx10
27445 { 11383, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #11383 = S_FF1_I32_B64_gfx6_gfx7
27446 { 11384, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #11384 = S_FF1_I32_B64_vi
27450 { 11388, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #11388 = S_FLBIT_I32_B64_gfx10
27451 { 11389, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #11389 = S_FLBIT_I32_B64_gfx6_gfx7
27452 { 11390, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #11390 = S_FLBIT_I32_B64_vi
27453 { 11391, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #11391 = S_FLBIT_I32_I64_gfx10
27454 { 11392, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #11392 = S_FLBIT_I32_I64_gfx6_gfx7
27455 { 11393, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #11393 = S_FLBIT_I32_I64_vi